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3-6
Advanced Chipset Features
The Advanced Chipset Features Setup option is used to change the values of the chipset
registers. These registers control most of the system options in the computer.
DRAM Timing Selectable
SDRAM CAS Latency Time
SDRAM RAS 2to CAS
SDRAM RAS Precharge
SDRAM Cycle Time
SDRAM Write Recovery Time
SDRAM Min Ref to ACT/CMD Time
SDRAM Int Wrt to RD Delay
SDRAM Row AcT to Row ACT Delay
SDRAM Int Rd to Prc Delay
System BIOS Cacheable
Memory Hole at 15-16M
PCI Press Root Port Function
↑↓→← Move Enter:Select +/-/PU/PD:Value F10:Save ESC:Exit F1:General Help
F5:Previous Values
Memory Timing Settings
Please refer to section 3-6-1
CAS # Latency
When synchronous DRAM is installed, the number of clock cycles of CAS latency depends
on the DRAM timing. The settings are: Auto,3, 4 and 5.
RAS-to-CAS Delay
This field let's you insert a timing delay between the CAS and RAS strobe signals, used when DRAM
is written to, read from, or refreshed. Fast gives faster performance; and Slow gives more stable
performance. This field applies only when synchronous DRAM is installed in the system. The
settings are: 4T and 3T.
RAS Precharge Time
If an insufficient number of cycles is allowed for the RAS to accumulate its charge before
DRAM refresh, the refresh may be incomplete and the DRAM may fail to retain date. Fast
gives faster performance; and Slow gives more stable performance. This field applies only
when synchronous DRAM is installed in the system. The settings are: 2T and 3T.
Phoenix – AwardBIOS CMOS Setup Utility
Advanced Chipset Features
Time
Disabled
Disabled
Press enter
F6:Optimized Defaults
Dy SPD
Auto
Auto
Auto
Auto
Auto
Auto
Auto
Auto
Auto
F7:Standard Defaults
36
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