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PROCESSOR/ DMI, PEG, FDI
CAD NOTE: DP_COMPIO and ICOMPO signal s
should be shorted near balls a nd rout ed with
- typical impedance < 25 mohms
1. 0 5 V S _ V T T
1 . 05 V S _ V T T
R 38 9
R 3 90
1 K _ 0 4
2 4 . 9 _ 1% _ 0 4
ED P
F unc ti on
Di sa bl e
ED P_ HP D: Pu ll -u p1 0K - DI SA BL ED
DP Compensation Signal
P Q 47
G
*M T N 7 0 0 2Z H S 3
1 1
E M B _ H P D
1 1
D P _ A U X P
1 1
D P _ A U X N
R 3 8 8
*1 0 0 K _0 4
1 1
D P _ T XP 0
1 1
D P _ T XP 1
1 1
D P _ T XP 2
1 1
D P _ T XP 3
1 1
D P _ T XN 0
1 1
D P _ T XN 1
1 1
D P _ T XN 2
1 1
D P _ T XN 3
11/0 3
Sandy Bridge Processor 1/7
( DMI,PEG,FDI )
U 3 4 A
J 22
P E G_ I C O MP I
J 21
B 2 7
P E G _I C O MP O
H 2 2
1 5
D M I _ T XN 0
D M I _ R X # [ 0]
P E G_ R C O MP O
B 2 5
1 5
D M I _ T XN 1
A 2 5
D M I _ R X # [ 1]
1 5
D M I _ T XN 2
D M I _ R X # [ 2]
B 2 4
K 3 3
1 5
D M I _ T XN 3
D M I _ R X # [ 3]
P E G _ R X # [ 0 ]
M3 5
P E G _ R X # [ 1 ]
B 2 8
L 34
1 5
D M I _ T XP 0
D M I _ R X [ 0 ]
P E G _ R X # [ 2 ]
B 2 6
J 35
1 5
D M I _ T XP 1
A 2 4
D M I _ R X [ 1 ]
P E G _ R X # [ 3 ]
J 32
1 5
D M I _ T XP 2
D M I _ R X [ 2 ]
P E G _ R X # [ 4 ]
B 2 3
H 3 4
1 5
D M I _ T XP 3
D M I _ R X [ 3 ]
P E G _ R X # [ 5 ]
H 3 1
P E G _ R X # [ 6 ]
G 2 1
G3 3
1 5
D M I _ R X N 0
D M I _ TX # [ 0 ]
P E G _ R X # [ 7 ]
E 2 2
G3 0
1 5
D M I _ R X N 1
D M I _ TX # [ 1 ]
P E G _ R X # [ 8 ]
F 2 1
F 3 5
1 5
D M I _ R X N 2
D M I _ TX # [ 2 ]
P E G _ R X # [ 9 ]
D 2 1
E 3 4
1 5
D M I _ R X N 3
D M I _ TX # [ 3 ]
P E G_ R X # [ 1 0 ]
E 3 2
P E G_ R X # [ 1 1 ]
G 2 2
D 3 3
1 5
D M I _ R X P 0
D 2 2
D M I _ TX [ 0 ]
P E G_ R X # [ 1 2 ]
D 3 1
1 5
D M I _ R X P 1
D M I _ TX [ 1 ]
P E G_ R X # [ 1 3 ]
F 2 0
B 3 3
1 5
D M I _ R X P 2
D M I _ TX [ 2 ]
P E G_ R X # [ 1 4 ]
C 2 1
C 3 2
1 5
D M I _ R X P 3
D M I _ TX [ 3 ]
P E G_ R X # [ 1 5 ]
J 33
P E G _R X [ 0 ]
L 35
P E G _R X [ 1 ]
K 3 4
A 2 1
P E G _R X [ 2 ]
H 3 5
1 5
F D I _ T X N 0
F D I 0 _ T X #[ 0 ]
P E G _R X [ 3 ]
H 1 9
H 3 2
1 5
F D I _ T X N 1
E 1 9
F D I 0 _ T X #[ 1 ]
P E G _R X [ 4 ]
G3 4
1 5
F D I _ T X N 2
F D I 0 _ T X #[ 2 ]
P E G _R X [ 5 ]
F 1 8
G3 1
1 5
F D I _ T X N 3
F D I 0 _ T X #[ 3 ]
P E G _R X [ 6 ]
B 2 1
F 3 3
1 5
F D I _ T X N 4
F D I 1 _ T X #[ 0 ]
P E G _R X [ 7 ]
C 2 0
F 3 0
1 5
F D I _ T X N 5
F D I 1 _ T X #[ 1 ]
P E G _R X [ 8 ]
D 1 8
E 3 5
1 5
F D I _ T X N 6
E 1 7
F D I 1 _ T X #[ 2 ]
P E G _R X [ 9 ]
E 3 3
1 5
F D I _ T X N 7
F D I 1 _ T X #[ 3 ]
P E G _ R X [ 1 0 ]
F 3 2
P E G _ R X [ 1 1 ]
D 3 4
P E G _ R X [ 1 2 ]
A 2 2
E 3 1
1 5
F D I _ T X P 0
F D I 0 _ T X [ 0]
P E G _ R X [ 1 3 ]
G 1 9
C 3 3
1 5
F D I _ T X P 1
F D I 0 _ T X [ 1]
P E G _ R X [ 1 4 ]
E 2 0
B 3 2
1 5
F D I _ T X P 2
F D I 0 _ T X [ 2]
P E G _ R X [ 1 5 ]
G 1 8
1 5
F D I _ T X P 3
B 2 0
F D I 0 _ T X [ 3]
M2 9
1 5
F D I _ T X P 4
F D I 1 _ T X [ 0]
P E G _T X # [ 0 ]
C 1 9
M3 2
1 5
F D I _ T X P 5
D 1 9
F D I 1 _ T X [ 1]
P E G _T X # [ 1 ]
M3 1
1 5
F D I _ T X P 6
F D I 1 _ T X [ 2]
P E G _T X # [ 2 ]
F 1 7
L 32
1 5
F D I _ T X P 7
F D I 1 _ T X [ 3]
P E G _T X # [ 3 ]
L 29
P E G _T X # [ 4 ]
J 1 8
K 3 1
1 5
F D I _ F S Y N C 0
F D I 0 _ F S Y N C
P E G _T X # [ 5 ]
J 1 7
K 2 8
1 5
F D I _ F S Y N C 1
F D I 1 _ F S Y N C
P E G _T X # [ 6 ]
J 30
P E G _T X # [ 7 ]
H 2 0
J 28
1 5
F D I _ I N T
F D I _ I N T
P E G _T X # [ 8 ]
H 2 9
P E G _T X # [ 9 ]
J 1 9
G2 7
1 5
F D I _ L S Y N C 0
F D I 0 _ L S Y N C
P E G _ TX # [ 1 0 ]
H 1 7
E 2 9
1 5
F D I _ L S Y N C 1
F D I 1 _ L S Y N C
P E G _ TX # [ 1 1 ]
F 2 7
P E G _ TX # [ 1 2 ]
D 2 8
P E G _ TX # [ 1 3 ]
F 2 6
P E G _ TX # [ 1 4 ]
E 2 5
A 1 8
P E G _ TX # [ 1 5 ]
E D P _ C O MP
e D P _ C O MP I O
A 1 7
M2 8
e D P _ I C O MP O
P E G_ T X [ 0 ]
E D P _ H P D #
B 1 6
M3 3
e D P _ H P D #
P E G_ T X [ 1 ]
M3 0
P E G_ T X [ 2 ]
L 31
C 1 5
P E G_ T X [ 3 ]
L 28
C 3 2 5
* 0 . 1u _ 1 0 V _ X7 R _0 4
D P _ A U X _ P
e D P _ A U X
P E G_ T X [ 4 ]
D P _ A U X _ N
D 1 5
K 3 0
C 3 2 4
* 0 . 1u _ 1 0 V _ X7 R _0 4
e D P _ A U X#
P E G_ T X [ 5 ]
K 2 7
P E G_ T X [ 6 ]
J 29
P E G_ T X [ 7 ]
C 3 3 0
* 0 . 1u _ 1 0 V _ X7 R _0 4
D P _ TX P _ 0
C 1 7
J 27
e D P _ T X[ 0]
P E G_ T X [ 8 ]
D P _ TX P _ 1
F 1 6
H 2 8
C 3 2 9
* 0 . 1u _ 1 0 V _ X7 R _0 4
e D P _ T X[ 1]
P E G_ T X [ 9 ]
C 3 2 7
* 0 . 1u _ 1 0 V _ X7 R _0 4
D P _ TX P _ 2
C 1 6
G2 8
G 1 5
e D P _ T X[ 2]
P E G _T X [ 1 0 ]
E 2 8
C 5 4 0
* 0 . 1u _ 1 0 V _ X7 R _0 4
D P _ TX P _ 3
e D P _ T X[ 3]
P E G _T X [ 1 1 ]
F 2 8
C 1 8
P E G _T X [ 1 2 ]
D 2 7
C 3 3 1
* 0 . 1u _ 1 0 V _ X7 R _0 4
D P _ TX N _0
e D P _ T X# [ 0 ]
P E G _T X [ 1 3 ]
D P _ TX N _1
E 1 6
E 2 6
C 3 2 8
* 0 . 1u _ 1 0 V _ X7 R _0 4
e D P _ T X# [ 1 ]
P E G _T X [ 1 4 ]
C 3 2 6
* 0 . 1u _ 1 0 V _ X7 R _0 4
D P _ TX N _2
D 1 6
D 2 5
e D P _ T X# [ 2 ]
P E G _T X [ 1 5 ]
D P _ TX N _3
F 1 5
C 5 4 1
* 0 . 1u _ 1 0 V _ X7 R _0 4
e D P _ T X# [ 3 ]
P Z 9 8 8 27 -3 6 4 B -0 1F
1. 0 5 V S _ V T T
20 mil
P E G_ C O MP
R 6 3
24 . 9 _ 1 %_ 0 4
SC70-5 & SC70-3 Co-lay
Q 17
5
1
GN D
N C
2
G N D
4
3
V C C
V O
* TM P 2 0
3 . 3 V
Q 16
2
1
1 :2 ( 4m il s: 8m il s)
V C C
OU T
C 9 9
3
C 1 0 0
GN D
0 . 1 u _ 10 V _ X 7 R _ 0 4
0. 1u _ 1 0V _X 7 R _ 0 4
G7 1 1 S T9 U
1
9 /2 0
PL A CE NE A R U3
2
E VT
On Board CPU Thermal Sensor
3 . 3 V
Analog Thermal Sensor
C 97
* 0. 1 u _ 1 6V _ Y 5V _0 4
U 1 1
1
4
R 1 22
*1 0 mi l _ 04
2
V D D
T H E R M
6
D + _ C P U
D +
A L E R T
Q 1 8
B
*2 N 39 0 4
D -_ C P U
3
7
5
D -
S D A TA
8
GN D
S C LK
*W 8 3 L 7 71 A W G
3, 8 , 1 1 , 1 3, 1 5 , 1 7 , 19 , 2 0 , 2 2 , 23 , 2 7 , 2 9, 3 1 , 3 2 , 3 4, 3 6
3 , 5 , 1 8 , 1 9, 2 0 , 3 5 , 37
Schematic Diagrams
T H E R M_ V O L T 2 8
3
Sheet 2 of 46
PROCESSOR/ DMI,
PEG, FDI
C R I T _T E M P _ R E P # 1 8
T S # _ D I M M0 _ 1 9, 1 0
S MD _C P U _T H E R M 1 4, 2 8
S MC _C P U _T H E R M 1 4, 2 8
3 . 3 V
1 . 0 5 V S _ V T T
PROCESSOR/ DMI, PEG, FDI B - 3
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