Sanyo RB-7201 Service Manual page 40

IC BLOCK DIAGRAM & DESCRIPTION
IC818 74VHCT374AMTC(Octal D-Type Flip_Flop)
CP
OE
IC881 LE28DW8102T(8MB FLASH MEMORY)
1
A15
2
A14
3
A13
4
A12
5
A11
6
A10
7
A9
8
A8
9
WE#
10
NC
11
NC
12
NC
13
NC
14
NC
15
NC
16
A18
17
A17
18
A78
19
A6
20
A5
21
A4
22
A3
23
A2
24
ACE#
Logic Diagram
D D
0 1
3 4
11
CP D CP D
O Q O Q
1
2 5
O O
0 1
Pin Descriptions
Pin Names Description
D -D Data Inputs
0 7
CP Clock Pulse Input 3-STATE
OE Output Enable Input 3-STATE
O -O Outputs
0 7
48 A16
47
VSS
46 DQ15
45
DQ7
44 DQ14
43
DQ6
42 DQ13
41
DQ5
40
DQ12
39
DQ4
38
NC
37
VDD
36
DQ11
35
DQ3
34
DQ10
33 DQ2
32
DQ9
31 DQ1
30
DQ8
29 DQ0
28
OE#
27 VSS
26
A0
25 A1
STM.
NAME
A18 Bank Selective Address
A17-A0 Flush Bank Address
A17-A15 Flush Bank Block Address
A17-A10 Flush Bank Sector Sddress
DQ15-DQ0 Data Input/Output
CE# Chip Enable
OE# Output Enable
WE# Write Enable
VDD Power Supply
GND Ground
NC No Connection
D D D
2 3 4
7 8 13
CP D CP D CP D
O Q O Q O Q
6 9 12
O O O
2 3 4
Truth Table
Dn
H
L
X
H = HIGH Voltege Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance
= LOW-to-HIGH Transition
CHARGE PUMP
COLUMN DECODER
&
VOLTAGE
REFERENCE
CIRCUIT
ADDRESS BUFFER
& LOW DECODER
LATCH CIRCUIT
A18-A0
CE#
CONTROL LOGIC
OE#
WE#
FUNCTION
Selects bank 1 when "L" and bank 2 when "H".
Sapply address for flush bank.
Select flush bank for erease.
Select flush bank sector for erease.
To output data during read cycle and receive input data during write
cycles. Data is internaliy latched during a writecycle. The output are
high inpedance when OE#,CE# is high.
To activate the flush bank when CE# is low.
To activate the data output buffer .
To control the write, erease and program.
207V~3.6V supply.
Not connect to internal chip.
- 57 -
D D D
5 6 7
14 17 18
CP D CP D CP D
O Q O Q O Q
15 16 19
O O O
5 6 7
Inputs Outputs
CP OE On
L H
L L
X H Z
256Kx16
FLUSH
BANK1
256Kx16
FLUSH
BANK2
DQ15.DQ0
IN/OUTPUT BUFFER
&
DATA LATCH