Microcode Patch Level
CPUID
CPU Stepping
Processor L1 Instruction Cache Processor first-level instruction cache size detected
Processor L1 Data Cache
Processor L2 Cache
Total L3 Cache per Socket
Processor Microcode Patch Level.
Processor ID number.
Processor stepping information.
during POST.
An Instruction: to speed up executable instruction fetch.
Processor first-level data cache size detected
during POST.
A Data Cache: to speed up data fetch and store.
Processor second-level cache size detected
during POST.
Processor third-level cache size detected
during POST.
39