Download Print this page

Sharp Compet 17 Manual page 3

Advertisement

IDLE
KCLR, KCE,
Keyboard
KAS, KS, KMD, KD,
KRC, KDP,
KMC, KMR,
KMAS, KMS
P Cycle
K0...K9
Generator
Numeral
KNDP
Encoder
KNUM
M
Sharp Compet 17 Calculator
Section: Block Diagram
Page: 3
Rendition: 2020 May 20
Timing
Ø1 Ø2
Ø3
ØB n
bit timing
C
D
M
Flag
Flag
Flag
P
Arithmetic
Outputs
CSUB C T C
CSUM
CARRY
X
X Register
(displayed operand, 48 bits)
Arithmetic
(BCD
serial adder, 4
bits)
W
XC1
Display Latch
XC2
(4 bits)
XC4
XC8
ØD n
digit timing
S
F
J
G
Flag
Flag
Flag
Flag
X Outputs
W Outputs
M Outputs
CX...
CWW
KMC
CA...
X
CWX
W
CMX
CB...
CWØ
CMØ
W Register
(2nd operand, 48 bits)
M Register
(user memory, 48 bits)
12 Nixie Displays
1-of-10
Decoder
000987654321.
and Drivers
Power Supply
V CL
V –24
V +90D V +90 V +190
logic supplies
display supplies
State
Sequencing
Control
S 1
PY Outputs
PW
Outputs
CPYPX
CPW...
PY
PY
Ring Counter
P W
Ring Counter
Decimal Point (PX)
Ring Counter
Decimal
Point
Driver
S 6
PX Outputs
CPX...
PW
PX
PXI

Advertisement

loading