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600
0µS
40
(47.6 KHz) Ø1
Ø2
Ø3
(11.9 KHz) ØB1
ØB2
ØB4
ØB8
ØnB1+3
(744 Hz) ØnD1
ØnD2
ØnD16
ØD1416
Øn(D16•B8•1)
X
X and PXI with
000987654321.
in the display.
PXI
ØD n
16
1
Digit being displayed
Sharp Compet 17 Calculator
Section: Timing Diagram
Page: 15
Rendition: 2020 May 20
80
120
160
200
2
3
4
5
1
2
3
4
(LSD)
240
280
320
360
6
7
8
9
5
6
7
8
One full number cycle
in registers
400
440
480
520
10
11
12
13
9
10
11
12
(MSD)
640
560
600
0µS
logic 1
(0V, GND)
logic 0
(–24V)
14
15
16
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