Table of Contents
Advertisement
<2-1-4-1-1_MSM8210_CONTROL>
W/ RxD
EBI_CS_1
* Note
The EBI_CLK need 100 ohm
impedance matching.
EBI_CKE_1
* Note
+1V8_VREG_L10
LGE Internal Use Only
CCDS CARD Information
Release Date
2013. 08. 31
Based on Reference Schematic
Rev.C
80-ND717-41 MSM8X10 + PM8110 REFERENCE SCHEMATIC
B12
EBI_CS_0
EBI_CS_0_N
D12
EBI_CS_1_N
B14
EBI_CLK
EBI_CLK
A13
EBI_CLK_B
EBI_CLKB
C11
EBI_CKE_0
EBI_CKE_0
A11
EBI_CKE_1
D24
EBI_DQS_0
The DQS and DQS_B need 100 ohm
EBI_DQS_0
C25
impedance matching.
EBI_DQS_0_B
EBI_DQS_0B
D26
EBI_DQS_1
EBI_DQS_1
C27
EBI_DQS_1_B
EBI_DQS_1B
C19
EBI_DQS_2
EBI_DQS_2
D20
EBI_DQS_2_B
EBI_DQS_2B
C33
EBI_DQS_3
EBI_DQS_3
D32
EBI_DQS_3_B
EBI_DQS_3B
Short trace
A7
R2101
EBI_CAL_REXT
240
TOL=0.01
D16
EBI_CA_0
EBI_CA_0
C15
EBI_CA_1
EBI_CA_1
A15
EBI_CA_2
EBI_CA_2
D14
EBI_CA_3
EBI_CA_3
C13
EBI_CA_4
EBI_CA_4
A9
EBI_CA_5
EBI_CA_5
D10
EBI_CA_6
EBI_CA_6
B10
EBI_CA_7
EBI_CA_7
B8
EBI_CA_8
EBI_CA_8
C9
EBI_CA_9
EBI_CA_9
B28
EBI_DM_0
EBI_DM_0
A29
EBI_DM_1
EBI_DM_1
B22
EBI_DM_2
EBI_DM_2
B34
EBI_DM_3
EBI_DM_3
C21
EBI_DATA_0
EBI_DATA_0
A23
EBI_DATA_1
EBI_DATA_1
A27
EBI_DATA_2
EBI_DATA_2
B26
EBI_DATA_3
EBI_DATA_3
B24
EBI_DATA_4
EBI_DATA_4
D22
EBI_DATA_5
EBI_DATA_5
C23
EBI_DATA_6
EBI_DATA_6
A25
EBI_DATA_7
EBI_DATA_7
C31
EBI_DATA_8
EBI_DATA_8
U2100
D30
EBI_DATA_9
EBI_DATA_9
C29
EBI_DATA_10
EBI_DATA_10
D28
MSM8210
EBI_DATA_11
EBI_DATA_11
A33
EBI_DATA_12
EBI_DATA_12
A31
EBI_DATA_13
EBI_DATA_13
B30
EBI_DATA_14
EBI_DATA_14
B32
EBI_DATA_15
EBI_DATA_15
A17
EBI_DATA_16
EBI_DATA_16
B16
EBI_DATA_17
EBI_DATA_17
D18
EBI_DATA_18
EBI_DATA_18
A19
EBI_DATA_19
EBI_DATA_19
B18
EBI_DATA_20
EBI_DATA_20
B20
EBI_DATA_21
EBI_DATA_21
A21
EBI_DATA_22
EBI_DATA_22
C17
EBI_DATA_23
EBI_DATA_23
D36
EBI_DATA_24
EBI_DATA_24
B38
EBI_DATA_25
EBI_DATA_25
D34
EBI_DATA_26
EBI_DATA_26
B36
EBI_DATA_27
EBI_DATA_27
A37
EBI_DATA_28
EBI_DATA_28
A35
EBI_DATA_29
EBI_DATA_29
C35
EBI_DATA_30
EBI_DATA_30
C37
EBI_DATA_31
EBI_DATA_31
L23
EBI_VREF_DQ
L19
Line width : 3mm
VREF_LPDDR2
EBI_VREF_CA
AY22
C2108
WTR0_PRXBB_I_N
BBRX_CH0_IM
AW21
WTR0_PRXBB_I_P
BBRX_CH0_IP
0.1u
AU21
WTR0_PRXBB_Q_N
BBRX_CH0_QM
AV20
WTR0_PRXBB_Q_P
BBRX_CH0_QP
R2113
0
AY24
BBRX_CH1_IM
AW23
R2114
0
BBRX_CH1_IP
R2115
0
AU23
BBRX_CH1_QM
R2116
0
AV22
BBRX_CH1_QP
R2107
Short trace
AV16
WLAN_REXT
3.9K
TOL=0.01
AN21
WLAN_I_N
WLAN_BB_IM
AL19
WLAN_I_P
WLAN_BB_IP
AL15
WLAN_Q_N
WLAN_BB_QM
AN17
WLAN_Q_P
WLAN_BB_QP
AY26
WTR0_TXBB_I_N
TX_DAC0_IM
AW27
WTR0_TXBB_I_P
TX_DAC0_IP
AU25
WTR0_TXBB_Q_N
TX_DAC0_QM
AV26
WTR0_TXBB_Q_P
TX_DAC0_QP
AN25
WTR0_DAC_IREF
TX_DAC0_IREF
AY28
TX_DAC1_QM
AW29
TX_DAC1_QP
AL27
TX_DAC1_IREF
AV18
WTR0_GNSSBB_I_N
GNSS_BB_IM
AU17
WTR0_GNSSBB_I_P
GNSS_BB_IP
AY18
WTR0_GNSSBB_Q_N
GNSS_BB_QM
AW17
WTR0_GNSSBB_Q_P
GNSS_BB_QP
* Note
C2109
C2110
DNI
DNI
Install bypass capacitors on IREF to GND
as needed to filter out signal noise.
REV.1.0
AD40
USB_D_M
USB_HS_DN
AC39
USB_HS_DP
USB_D_P
AE39
Short trace
R2100
USB_HS_REXT
200
TOL=0.01
AA3
MIPI_CSI0_CLK_P
MAIN_CAM0_MIPI_CLK_P
AB4
MIPI_CSI0_CLK_N
MAIN_CAM0_MIPI_CLK_N
W1
MIPI_CSI0_LN1_P
MAIN_CAM0_MIPI_DATA0_P
Y2
MIPI_CSI0_LN1_N
MAIN_CAM0_MIPI_DATA0_N
AA1
MIPI_CSI0_LN2_P
MAIN_CAM0_MIPI_DATA1_P
AB2
MIPI_CSI0_LN2_N
MAIN_CAM0_MIPI_DATA1_N
AD4
MIPI_CSI1_CLK_P
VT_CAM_MIPI_CLK_P
AE3
MIPI_CSI1_CLK_N
VT_CAM_MIPI_CLK_N
AC1
MIPI_CSI1_LN0_P
VT_CAM_MIPI_DATA0_P
AD2
MIPI_CSI1_LN0_N
VT_CAM_MIPI_DATA0_N
T4
LCD_MIPI_CLK_P
MIPI_DSI_CLK_P
U3
MIPI_DSI_CLK_N
LCD_MIPI_CLK_N
V4
MIPI_DSI_LN0_P
W3
MIPI_DSI_LN0_N
U1
LCD_MIPI_DATA1_P
MIPI_DSI_LN1_P
V2
MIPI_DSI_LN1_N
LCD_MIPI_DATA1_N
R1
MIPI_DSI_LN2_P
LCD_MIPI_DATA2_P
T2
MIPI_DSI_LN2_N
LCD_MIPI_DATA2_N
N1
MIPI_DSI_LN3_P
P2
MIPI_DSI_LN3_N
AV4
SPKR_DRV_P
SPK_P
AW3
SPKR_DRV_M
SPK_N
AU7
EARO_P
RCV_P
AU5
EARO_M
RCV_N
AU9
HPH_REF
HPH_REF
* Note : Earjack Debugger Option
AY10
HPH_L
HPH_L_OUT
HPH_L --> HPH_L_OUT
AV10
HPH_R
HPH_R_OUT
HPH_R --> HPH_R_OUT
* Note
AV6
CP_VPOS
C2100
1u
The GND side of C2100 & C2101 must connct to CP_GND (pin AV8)
CP_GND
AW9
C2101
2.2u
before connecting to the ground plane.
CP_VNEG
AW7
CP_C1_P
AY8
DGMS Guide
C2102
2.2u
CP_C1_N
MC-C06162-1 : 1. Don't connect Positive of Tantal, TVS diode
2. We recommend MLCC capacitor in this case
AM4
MIC_BIAS
MIC_BIAS_1
AV2
R2111
HS_DET
20K
AP4
MIC1_IN
AT2
MIC2_IN
AR1
MIC3_IN
AT4
LINE_OUT
AP2
C2107
1u
CCOMP
CDC_GND
W37
SRST_N
JTAG_SRST
T40
TCK
JTAG_TCK
V38
TDI
JTAG_TDI
W39
TDO
JTAG_TDO
U39
TMS
JTAG_TMS
V40
TRST_N
JTAG_TRST
H38
SDC1_DATA_0
eMMC_DATA_0
G37
SDC1_DATA_1
eMMC_DATA_1
C39
SDC1_DATA_2
eMMC_DATA_2
E39
SDC1_DATA_3
eMMC_DATA_3
E37
SDC1_DATA_4
eMMC_DATA_4
F40
SDC1_DATA_5
eMMC_DATA_5
* Note
G39
SDC1_DATA_6
eMMC_DATA_6
F38
1. Place SDC1/SDC2 CLK resistors close to MSM.
SDC1_DATA_7
eMMC_DATA_7
2. Install to help with signal integrity
D38
SDC1_CMD
eMMC_CMD
D40
R2106
SDC1_CLK
33 TOL=0.01
C7
SDC2_DATA_0
B6
SDC2_DATA_1
D6
SDC2_DATA_2
C5
SDC2_DATA_3
D8
SDC2_CMD
A5
R2108
SDC2_CLK
33
TOL=0.01
B40
MODE_0
R2109
DNI
+1V8_VREG_L14
A39
MODE_1
R2110
DNI
00 : Native mode
Y40
MSM_RESIN_N
RESIN_N
01 : Boundadry Scan mode
AB40
RESOUT_N
MSM_RESOUT_N
* Note : Mode pins configuration
AA37
SLEEP_CLK
SLEEP_CLK
AE37
USB_HS_SYSCLK
AJ29
CXO
BB_CLK
Y38
* Note
CXO_EN
BB_CLK_EN
C2111
33p
1. Place C2111 and C2112 capacitors close to MSM.
C1
PMIC_SPMI_DATA
PMIC_SPMI_DATA
2. 33pF shunt caps must be no more than 2mm
D2
PMIC_SPMI_CLK
PMIC_SPMI_CLK
away from the MSM.
C2112
DNI
AE1
MPM_LDO_BYP_EN
AA39
PS_HOLD
MSM_PS_HOLD
- 202 -
* Note : QMC Comment (#01164155)
if only 2 DSI lanes (out of 4 lanes) are used,
we recommend to use lane1 and lane2,
which will have a little better margin.
EAR_SENSE_JACK
MIC_IN1_P
EAR_MIC_JACK
MIC_IN3_P
C2103
C2104
C2105
DNI
DNI
DNI
R2103
0
MIC_IN1_N
CDC_GND
R2104
0
MIC_IN2_N
CDC_GND
R2105
0
MIC_IN3_N
CDC_GND
HPH_REF
R2112
DNI
CDC_GND
eMMC_CLK
SDCARD_DATA_0
SDCARD_DATA_1
SDCARD_DATA_2
SDCARD_DATA_3
SDCARD_CMD
SDCARD_CLK
Copyright © 2014 LG Electronics. Inc. All right reserved.
6. CIRCUIT DIAGRAM
Only for training and service purposes
Advertisement
Table of Contents
Troubleshooting
