ECS P6IEMT Manual page 49

SDRAM CAS Latency Time (3)
This item enables you to select the CAS latency time in
HCLKs of 2/2 or 3/3. The value is set at the factory depending
on the DRAM installed. Do not change the values in this field
unless you change the specifications of the installed DRAM or
the installed CPU.
SDRAM Cycle Time Tras/Trc (7/9)
This item sets the minimum time from activation to activation
of the same memory bank. When synchronous DRAM is i n -
stalled, the number of clock cycles of CAS latency depends
on the DRAM timing. We recommend that you leave this item
at the default value.
SDRAM RAS-to-CAS Delay (3)
This sets the relative delay between the Row Address Strobe
(RAS) and the Column Address Strobe (CAS). Select the RAS
to CAS delay time in HCLKs of 2/2 or 3/3. The value is set at
the factory depending on the DRAM installed. Do not change
the values in this field unless you have changed the specifica-
tions of the installed DRAM or the installed CPU.
SDRAM RAS Precharge Time (3)
DRAM must continually be refreshed or it will lose its data. This
option allows you to determine the number of CPU clocks allo-
cated for the Row Address Strobe (RAS) to accumulate its
charge before the DRAM is refreshed. If insufficient time is a l-
lowed, refresh may be incomplete and data lost.
System BIOS/Video RAM Cacheable (Enabled)
These items allow the video and system to be cached in
memory for faster execution. Leave these items at the default
value for better performance.
Memory Hole At 15M–16M(Disabled)
This item is used to reserve memory space for ISA expansion
cards that require it.
CPU Latency Timer (Enabled)
This item sets a timing parameter for CPU access. Since the
CPU timing is determined by the system hardware, leave this
item at the default value.
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