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Processor 5/6
5
VCCSA
?
SKYLAKE _HA LO
U29I
11.1A
BGA1440
J30
AA6
D
VCCSA
VDDQ
K29
AE12
VCCSA
VDDQ
K30
AF5
VCCSA
VDDQ
K31
AF6
VCCSA
VDDQ
K32
AG5
VCCSA
VDDQ
K33
AG9
VCCSA
VDDQ
K34
AJ12
VCCSA
VDDQ
K35
AL11
VCCSA
VDDQ
L31
AP6
VCCSA
VDDQ
L32
AP7
VCCSA
VDDQ
L35
AR12
VCCSA
VDDQ
L36
AR6
VCCSA
VDDQ
L37
AT12
VCCSA
VDDQ
L38
AW6
VCCSA
VDDQ
M29
AY6
VCCSA
VDDQ
M30
J5
VCCSA
VDDQ
M31
J6
VCCSA
VDDQ
M32
K12
VCCSA
VDDQ
M33
K6
VCCSA
VDDQ
M34
L12
VCCSA
VDDQ
M35
L6
VCCSA
VDDQ
VCCIO
M36
R6
VCCSA
VDDQ
T6
VDDQ
W6
5.5A
VDDQ
AG12
VCCIO
G15
Y12
VCCIO
VDDQC
G17
VCCIO
G19
BH13
VCCIO
VCCPLL_OC
G21
G11
VCCIO
VCCPLL_OC
C
H15
VCCIO
H16
VCCIO
H17
H30
VCCIO
VCCST
H19
VCCIO
H20
H29
VCCIO
VCCSTG
H21
VCCIO
H26
G30
VCCIO
VCCSTG
H27
VCCIO
J15
H28
VCCIO
VCCPLL
J16
J28
VCCIO
VCCPLL
J17
VCCIO
J19
VCCIO
J20
M38
VCCIO
VCCSA_SENSE
J21
M37
VCCIO
VSSSA_SENSE
J26
VCCIO
J27
H14
VCCIO
VCCIO_SENSE
J14
VSSIO_SENSE
9 OF 14
QL2X
REV = 1
?
B
VDDQ
Gary_D02 for common design(to X6S)
C425
C348
C429
C347
C346
Gary_nonstuff
A
5
4
3
PLACE CAP BACKSIDE
VCCVDDQ_CLK
1.0V_VCCST
1.0V_VCCST
VDDQ
C296
C214
C213
2.8A
1.0DX_VCCSTG
VCCSFR_OC
C193
C155
C442
C298
VCCVDDQ_CLK
Gary_D02 for common design(to X6S)
VCCSFR_OC
30
PCH_2_CPU_TRIGGER
R458
30.1_1%_04
30
CPU_2_PCH_TRIGGER
1.0DX_VCCSTG
VCCFUSEPRG
0.06A
1.0V_VCCST
R31
*28mil short-p
NEAR TO CPU PIN
Gary_DEL test point
VCCIO
0.15A
1.0V_VCCST
R120
100_1%_04
VCCSA_SENSE
48
VSS_SA_SENSE
48
VCCIO_SENSE
VSS_IO_SENSE
R121
100_1%_04
PLACE CAP BACKSIDE
Gary_Change
footprint
VDDQ
VCCIO
C475
C430
C467
C463
C271
C272
C297
Gary_nonstuff
Gary_D02 for common design(to X6S)
4
3
2
?
SKYLAKE _HA LO
place to angle
U29K
BGA1440
TP_SKL_D1
T104
D1
TP_SKL_E1
RSVD_TP
RSVD_TP
E1
T106
TP_SKL_E3
RSVD_TP
RSVD_TP
T103
E3
TP_SKL_E2
RSVD_TP
T105
E2
RSVD_TP
RSVD_TP
TP_SKL_BR1
RSVD_TP
BR1
TP_SKL_BT2
RSVD_TP
BT2
RSVD_TP
RSVD
RSVD
BN35
RSVD
Gary_DEL test point
VSS
J24
RSVD
H24
RSVD
RSVD_TP
BN33
RSVD
RSVD_TP
BL34
RSVD
TP_SKL_N29
N29
TP_SKL_R14
RSVD
RSVD_TP
R14
TP_SKL_AE29
RSVD
RSVD_TP
AE29
TP_SKL_AA14
RSVD
AA14
RSVD
RSVD
RSVD
A36
RSVD
A37
RSVD
RSVD
RSVD
H23
PROC_TRIGOUT
PROC_TRIGIN
J23
PROC_TRIGOUT
VSS
F30
RSVD
RSVD_TP
E30
RSVD
RSVD_TP
B30
RSVD
C30
RSVD
RSVD
G3
RSVD
RSVD
J3
RSVD
RSVD
NCTF
NCTF
TP_SKL_BR35
NCTF
BR35
TP_SKL_BR31
RSVD
NCTF
BR31
TP_SKL_BH30
RSVD
NCTF
BH30
RSVD
NCTF
11 OF 14
QL2X
REV = 1
?
VCCVDDQ_CLK
PLACE CAP IN BACK SIDE
PLACE CAP IN BOARD EDGE
CPU_BACK_VCCSA
CPU_TOP_VCCSA
VCCSA
VCCSA
VCCSA
C43
C87
C595
C594
C44
C45
Gary_nonstuff
Gary_nonstuff
8,9,25,33,34,44,47
VDDQ
2,42,47
VCCIO
48
VCCSA
4,47,49
1.0DX_VCCSTG
Title
Title
Title
[06] Processor 6/7-POWER2
[06] Processor 6/7-POWER2
[06] Processor 6/7-POWER2
47
VCCSFR_OC
4,24,25,42,46
1.0V_VCCST
Size
Size
Size
Document
Document
Document
Number
Number
Number
6-71-N8500-D02
6-71-N8500-D02
6-71-N8500-D02
A3
A3
A3
SCHEMATIC1
SCHEMATIC1
SCHEMATIC1
Date :
Date :
Date :
Tuesday, October 25, 2016
Tuesday, October 25, 2016
Tuesday, October 25, 2016
2
Schematic Diagrams
1
D
TP_SKL_BM33
BM33
TP_SKL_BL33
BL33
TP_SKL_BJ14
BJ14
TP_SKL_BJ13
BJ13
BK28
BJ28
Gary_DEL test point
BJ18
TP_SKL_BJ16
BJ16
TP_SKL_BK16
BK16
TP_SKL_BK24
BK24
TP_SKL_BJ24
BJ24
BK21
BJ21
Gary_DEL test point
BT17
BR17
Sheet 6 of 58
BK18
C
TP_SKL_BJ34
BJ34
Processor 5/6
TP_SKL_BJ33
BJ33
G13
AJ8
Gary_DEL test point
BL31
TP_SKL_B2
B2
TP_SKL_B38
B38
TP_SKL_BP1
BP1
TP_SKL_BR2
BR2
TP_SKL_C1
C1
TP_SKL_C38
C38
AROUND_CPU
VDDQ
B
R179
*28mil short-p
VCCSA
C86
C46
A
R e v
R e v
R e v
D02
D02
D02
Sheet
Sheet
Sheet
6
6
6
o f
o f
o f
58
58
58
1
Processor 5/6 B - 7
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