APPENDIX 1. BLOCK DIAGRAM
Operation
Panel
Paper
Near End
I/F
*1
Interface
DC 7.2V DC5V
DC
Power
7.2V
Source
Power
Control
*1 Serial Interface --- RS-232C compliant
Parallel Interface --- Centronics compliant
OSC 16MHz
CPU
Reset
Ni-MH
— 98 —
Japanese Only
RAM
ROM
G/A
DIP Switch
Paper End
Head-up
Driver
Stepping Motor
Kanji
ROM
Print Head