Digitized Sound; Genlock And The Ste - Atari 520STE Field Service Manual

TELEVISION: the composite signal is modulated onto an RF carrier. The signal is
locked onto the color burst frequency by the phase locked loop (PLL). Without the
PLL, the colors will shift or dance on the TV screen.
2.10 STE DIGITIZED SOUND
The Atari ST family of computers is equipped to reproduce digitized sound using
DMA (direct memory access; that is, without using the 68000). This section provides
the information required to understand and use this feature.
2.10.1 Overview
Sound is stored in memory as digitized samples. Each sample is a number, from
-128 to +127, which represents displacement of the speaker from the "neutral" or
middle position. During horizontal blanking (transparent to the processor) the DMA
sound chip fetches samples from memory and provides them to a digital–to–analog
converter (DAC) at one of several constant rates, programmable as (approximately)
50 kHz (kilohertz), 25 kHz. 12.5 kHz, and 6.25 kHz. This rate is called the sample
frequency.
The output of the DAC is then filtered to a frequency equal to 40% of the sample
frequency by a four–pole switched low–pass filter. This performs "anti–aliasing" of
the sound data in a sample–frequency–sensitive way. The signal is further filtered by
a twopole fixed frequency (16 KHz) low–pass filter and provided to a National LMX
1992 Volume/Tone Controller– Finally the output is available at an RCA–style output
jack on the back of the computer. This can be fed into an amplifier, and then to
speakers, headphones, or tape recorders.
There are two channels which behave as described above; they are intended to be
used as the left and right channels of a stereo system when using the audio inputs of
the machine. A monophonic mode is provided which will send the same sample data
to each channel.
The stereo sound output is also mixed onto the standard ST audio output sent to the
monitor's speaker. The ST's GI sound chip output can be mixed to the monitor and to
both stereo output jacks as well.

2.11 GENLOCK AND THE STE

The ST (and STE) chip set have the ability to accept external sync. This is controlled
by bit 0 at FF820A, as documented in the ST Hardware Specification. This is
provided to allow the synchronization of the ST video. In order to do this reliably the
system clock must also be phase–locked (or synchronized in some other way) to the
input sync signals. No way to achieve this was provided in the ST. As a result, the
only GENLOCKs available were internal modifications (usually for the MEGA).
The STE, on the other hand, allows this to be done without opening the case. To
inject a system clock ground pin three (GPO) on the monitor connector and then
inject the clock into pin 4 (mono detect). The internal frequency of this clock is
32.215905 MHz (NTSC) and 32.084988 MHz (PAL).
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