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Basic Block Diagram - FujiFilm FinePix6800Zoom Schematics

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FinePix6800Zoom(U/E/EG) SCHEMATICS
2-2. Explanation of Block Functions
2-2-1. New Technology
1. The newly developed CCD (1/1.7" honeycomb array CCD sensor, approximately 3.3 million pixels, employing RGB
filters), in combination with honeycomb signal processing, allows the creation of 6 million pixel-equivalent image files.
2. Development of a new IC (SCS3D_IC) provides high-resolution image quality with 6 million pixel-output, with coring
settings optimized to brightness to reduce noise at low brightness levels without loss of resolution at high brightness
levels.
3. Use of a camera cradle connected to the PC via a USB interface, and to the AC adapter, simplifies uploading of images
and charging.
2-2-2. Main Board
(1) Imaging Circuit (cam block)
The analog video signal from the CCD (1/1.7" honeycomb array, 3.3 million pixels) is amplified, mixed with other
signal, pseudo color-corrected, and interpolation optimized in the SCS3A_IC (IC107: CSP_IC), and converted to a
12-bit digital signal which is then sent to the single-chip SCS2D_IC (IC305: CSP_IC).
(CSP_IC - Chip Size Package IC)
(2) Image Signal Processing Circuit (process block)
O
Data input from the CCD
The 12-bit digital image data (1H equivalent) from the imaging section (cam block) is sent to the SCS2D_IC where
it is buffered and converted to 32-bit (16-bit x 2) data. The 32-bit image data is sent from the DMA unit within the
SCS2D_IC to the SCS3D_IC (IC304: CSP_IC), and stored in the SDRAM_IC (IC307, IC310: 128MBit). The equiv-
alent of a single frame (2400 pixels x 900 lines) of image data is temporarily stored in the SDRAM_IC. At the same
time, AE is computed in the AUTO processing unit based on the 12-bit image data previously sent to the SCS2D_IC,
and the necessary data for AE, AWB, and AF sent to the on-board DRAM. The data is transferred to the SCS3A_IC
in serial format to ensure that the appropriate AE, AWB, and AF are available in the on-board DRAM.
O
Recording image data in the SSFDC
The image data stored in the SDRAM_IC is converted from 32-bit to 12-bit data one line at a time in the internal
buffer of the SCS2D_IC, and sent to the signal processor. The 12-bit image data is converted to 8-bit Y and C
signals in the signal processing unit, and again sent to the on-board buffer. Each 8-bit Y and C signal is converted
to 8-bit Y, Y, Cb and Cr signals which are then sent to the SDRAM_IC. The image data stored in the SDRAM_IC is
compressed in the JPEG processing unit in the SCS2D_IC, and again saved in the SDRAM_IC. Following com-
pression, the image data is recorded sequentially to the SSFDC via the media controller in the SCS2D_IC.
O
Reproducing image data from the SSFDC
The compressed image data from the SSFDC is sent to the SCS2D_IC and stored in the SDRAM_IC via the media
controller. This data is decompressed in the JPEG processing unit and again stored in the SDRAM_IC. The de-
compressed image data is sent to the signal processing unit via the on-board buffer. The 8-bit Y, Y, Cb and Cr
signals in the image data are then converted to brightness and color difference signals in the signal processing
unit, sent from the VRAM controller to the encoder and D/A converter for conversion to analog signals, weightings
added for the character generator, and finally output as analog RGB signals (the B signal also contains the VBS
signal).
O
Movies
The 12-bit digital image data output from the imaging circuits (cam block) is sent from the SCS2D_IC on-board
buffer to the signal processing unit where it is converted to 8-bit Y and C signals and sent to the VRAM (1MB) in the
VRAM controller. The image data in the VRAM is sent to the SDRAM_IC, compressed in the SCS2D_IC JPEG
processing unit, and again stored in the SDRAM_IC. The compressed data is then sent sequentially to the SSFDC
via the media controller in the SCS2D_IC.
O
Image adjustment data is stored in the EEPROM IC (IC314).
(3) LCD Controller (LCD block)
O The 6-bit signal from the image signal processor IC (SCS2D_IC) is output directly to the LCD panel. The LCD
monitor (2" Type , 130,000 pixels) is the same as that used in the FinePix 4700Z (low-temperature polysilicon TFT).
2-2-3. Power Circuit (DCST board)
O The power circuit generates 16V and -8V (CCD drive), 2.5V (SCS2D_IC voltage), 3.3V (SCS3A_IC, SCS2D_IC,
SDRAM, ROM, USB, LED, keys), 5V (lens drive, strobe, LCD backlighting), 12V and 15V (LCD controller), and the
CPU_UNREG signal.

2.Basic Block Diagram

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