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5.2.2 Test Operation and Debugging
Description of test operation procedures and main board display of ODU.
VEPS075N432K , VEPS096N432K , VEPS120N432K :
——
Progress
01_Set master unit
02_ Allocate
addresses
03_ Confirm the
quantity of ODU
Description of each stage of debugging progress
Debugging code
LED
Code
Display status
A0
ON
01
ON
Display
02/Ad
circularly
Display
02/L7
circularly
Display
02/oC
circularly
Display
03/01
circularly
Code meaning and operation method
System is not debugged, hold main board's SW3 button for 5s
to start debugging.
2s later, next step starts.
System is allocating addresses. 10s later, display as below:
No master indoor unit. Display will be on for 1min, during
which master IDU can be set manually. If not, system will set
the unit with minimum IP address as the master IDU.
Allocation is finished. 2s later, next step starts.
System is confirming. 1s later, next step starts.
24
DC Inverter Multi VRF System
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