HP 3478A Technical Manual page 103

3478A 3478A
Function Function
and and Range Range
ACV 300mV ACV 300mV
ACV ACV 3 3 V V
ACV ACV 30 30 V V
ACV ACV 300 300 V V
ACI 300mA ACI 300mA
ACI ACI 3 3 A A
range and function selected range and function selected). ). The gains are d
by resistors RA5, RA6, RA7, and RA8 (all in U102), as by resistors RA5, RA6, RA7, and RA8 (all in U102), as
shown in shown in Figure 7-F-5. Figure 7-F-5. The gain determining resistors
are selected by FETs S7AC to SIOAC (all in U102) which are selected by FETs S7AC to SIOAC (all in U102)
operate as switches (see operate as switches (see Table 7-F-2)
U102) is used for the amplifier to have the same high U102) is used for the amplifier to have the same high
frequency resp frequency response in X4 gain onse in X4 gain as in X.4 gain.
R306 and R307, and C310 and C312 are used to filter R306 and R307, and C310 and C312 are used to filter
the + 15V the + 15V and -15V power supplies, and -15V power supplies, respective- ly.
c. c. The third amplifier The third amplifier stage (U302)
inverting amplifier with a gain of X25 in all ac ranges and inverting amplifier with a gain of X25 in all ac ranges and
func- tions. func- tions. The output The output of the amplifier
RMS Converter and is 3V RMS for all full scale ac inputs RMS Converter and is 3V RMS for all full scale ac inputs
in all ac in all ac functions and functions and ranges.
for high frequency compensation (for flat gains at high for high frequency compensation (for flat gains at high
fre- quency). fre- quency).
7-F-29. 7-F-29. True True RMS Converte RMS Converter r (U303).
Converter's output is a positive dc voltage with its value Converter's output is a positive dc voltage with its value
equal to the true rms value of the input equal to the t rue rms value of the input. . For example, a
sine wave input of IV RMS ac generates a + 1V dc out- sine wave input of IV RMS ac generates a + 1V dc out-
put. put.
7-F-30. Refer t 7-F-30. Refer to Schemat o Schematic 2.
one major stage that does the actual conversion and a one major stage that does the actual conversion and a
buffer (used as an buffer (used as an output stag output stage).
and the buffer are extern and the buffer are externally connected
of U303 is the input to the buffer and pin 10 is the out- of U303 is the input to the buffer and pin 10 is the out-
put of t put of the converter he converter stage. stage. The gain of the buffer
which is internally set. which is intern ally set. Capacitor C307 is the
verter's averaging capacitor and C308, C309, and verter's averaging capacitor and C308, C309, and
resistor R304 are used with the buffer as a ripple filter. resistor R304 are used with the buffer as a ripple filter.
7-F-31. A/D 7-F-31. A/D Converter Converter
7-F-32. General. The A/D Converter is used to change 7-F-32. General. The A/D Converter is used to change
dc voltages to dc voltage s to digital information. digital information. The circuitry
of an Integrator (U401 and associated circuitry), Voltage of an Integrator (U401 and associated circuitry), Voltage
Reference (U461 and associated circuitry), and the A/D Reference (U461 and associated circuitry), and the A/D
Hybrid (U403). Hybrid (U403). The The A/D
controlled by the A/D Controller (U462). controlled by the A/D Controller
7-F-33. The A/D conversion 7-F-33. The A/D conversion method used by
is called Multi-Slope II and has two operating states: is called Multi-Slope II and has two operating states:
Runup and Runup and Rundown. Rundown.
digits are determined during runup (see paragraph 7-F- digits are determined during runup (see paragraph 7-F-
41) and the least significant digits are determined during 41) and the least significant digits are determined during
rundown. The integration rundown. The integration time depends
Table 7-F-2 Table 7-F-2. . AC Amplifier
Stag Stag 1 1
Gain Gain
.1 .1
.1 .1
.001 .001
.001 .001
1 1
1 1
The gains are determined
The gain determining resistors
Table 7-F-2). . Resistor Resistor RA9
as in X.4 gain. Resistors
respective- ly.
stage (U302) is a non- is a non-
of the amplifier is applied to is applied to the
ranges. Capacitor C305 Capacitor C305 is used
(U303). The True RMS The True RMS
For example, a
ic 2. The RMS The RMS Converter Converter has
e). The converter The converter stage
ally connected by R304. by R304. Pin 9
The gain of the buffer is X1
Capacitor C307 is the RMS Con- RMS Con-
The circuitry consists
A/D Converter Converter operation operation is is
(U462).
method used by the 3478A the 3478A
The 3478 The 3478A's A's most significant most significant
time depends on the on the
AC Amplifier Gains
Stag 2 2 Stag Total Total
Gain Gain
4 4
.4 .4
4 4
.4 .4
4 4
.4 .4
etermined selected Number Of Digits Displayed (3 1/2, 4 1/2, or 5 selected Number Of Digits Displayed (3 1/2, 4 1/2, or 5
1/2). To help understand 1/2).
operation operation of the
which
method is explained in the following paragraph. method is explained in the following paragraph.
RA9 (in (in
7-F-34. Dual-Slope 7-F-34.
sion, an integrator capacitor charges for a fixed time sion, an integrator capacitor charges for a fixed time
Resistors
period (as shown in Figure 7-F-6) period (as shown in
runup. The charging rate runup.
the charge is proportional to the voltage applied to the the charge is proportional to the voltage applied to the
integrator. The integrator capacit integrator.
a fixed rate determined by a known reference voltage a fixed rate determined by a known reference voltage
the
and is done during rundow and is done
constant, the discharge time is proportional to the constant, the discharge time is proportional to the
is used
amplitude of the charge amplitude of
level can then level can then be determined
35. Multi-Slope 35. Multi-Slope II Conv
Dual-Slope in that a capacitor is charged and discharged Dual-Slope in that a capacitor is charged and
by the input voltage and by known reference voltages. by the input voltage and by known reference voltages.
The following paragraphs explain the Multi- Slope II The following paragraphs explain the Multi- Slope II
operation (runup and rundown). operation (runup and rundown).
7-F-36. Simplified Ex 7-F-36.
has
operation lasts for 349 A/D counts with one A/D count operation lasts for 349 A/D counts with one A/D count
equal to 30 (36 in the 50Hz option) cycles of the ALE equal to 30 (36 in the 50Hz option) cycles of the ALE
stage
clock (Address Latch Enable at U462 clock (Address Latch
Pin 9
count results in one A/D ramp (or slope) at the output of count results in one A/D ramp (or slope) at the output of
the A/D Integrator. the A/D I
is X1
1/2 and 4 1/2 digit mode (349 ramps), with 10 readings 1/2 and 4 1/2 digit mode (349 ramps), with 10 readings
taken in the 5 1/2 digit mode (making the integration time taken in the 5 1/2 digit mode (making the integration time
time longer, see paragraph time longer,
used in the used
generated.by the A/D Controller (U462, also known as generated.by the A/D Controller (U462, also known as
the Floating Common CPU). the Floating Com
consists
7-F-9 7-F-9
Gains
Switches (FETs) Switches
Gain Gain
10 10 S2AC,S4AC,S5AC,S8AC,S10AC S2AC,S4AC,S5AC,S8AC,S10AC
1 1 S2AC,S4AC,S5AC,S7AC,S9AC S2AC,S4AC,S5AC,S7AC,S9AC
.1 .1 S1AC,S3AC,S6AC,SBAC,S10AC S1AC,S3AC,S6AC,SBAC,S10AC
.01 .01 S1AC,S3AC,S6AC,S7AC,S9AC S1AC,S3AC,S6AC,S7AC,S9AC
100 100 S4AC,S5AC,S8AC,S10AC,S1 S4AC,S5AC,S8AC,S10AC,S1 1AC
10 10 S4AC,S5AC,S7AC,S9AC,S1 S4AC,S5AC,S7AC,S9AC,S1 1AC
To help understand Multi-Slope II, Multi-Slope II, first consider the
of the Dual-Slope Dual-Slope Conversion
Dual-Slope Conversion. Conversion. In dual-slope conver-
Figure 7-F-6), which is done during
The charging rate and the result and the resultant amplitude of
The integrator capacitor is then discharged a
during rundown. n. Since the dischar
the charge (input volt (input voltage).
be determined by the discha
II Conversion. ersion. Multi-Slope
Simplified Explanation of planation of Runup.
Enable at U462 pin 11).
ntegrator. The same time is used The same time is used in both th
see paragraph 7-F-40). 7-F-40). Only 34
in the 3 1/2 3 1/2 digit mode. digit mode.
mon CPU). Refer to
Figure 7- Figure 7-F-6. F-6. Dual Slope Dual Slope Conversion
TM 11-6625-3071-14 TM 11-6625-3071-14
(FETs)
Enabled Enabled
1AC
1AC
first consider the
Conversion method. method. This This
In dual-slope conver-
, which is done during
ant amplitude of
or is then discharged at t
Since the discharge rate is ge rate is
age). The amplitude The amplitude
by the discharge time. rge time. 7-F- 7-F-
Multi-Slope II is similar II is similar to to
discharged
Runup. The Runup The Runup
pin 11). Each A/D Each A/D
in both the 5
Only 34 ramps are ramps are
The ALE clock is The ALE clock is
Refer to Figure Figure
Conversion
e 5