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IC
MB15U10PFV-ER (FUJITSU)
PLL FREQUENCY SYNTHESIZER WITH PRE-SCALER
—TOP VIEW—
P1/fp1
1
20
I
P2/fp2
2
19
P0/LD
Do1
3
18
Vp
V
1
4
17
Do2
CC
PS
5
16
A.GND
fin1
6
15
fin2
D.GND
7
14
V
OSCin
8
13
LE
P3/fr2
9
12
Data
OSCout
10
11
Clock
INPUTS
Clock
: CLOCK
Data
: DATA
fin1, fin2
: RF (PLL1, 2)
I
: CHARGE PUMP OUTPUT CURRENT ADJUSTMENT
SET
LE
: LOAD ENABLE OF SERIAL INPUT DATA (H : DATA IS SHIFTED INTO A LATCH)
OSCin
: CRYSTAL OSCILLATOR OR TCXO
PS
: POWER SAVING MODE CONTROL (L : POWER SAVING MODE)
Vp
: POWER SUPPLY FOR CHARGE PUMP
OUTPUTS
Do1, Do2
: CHARGE PUMP (PLL1, 2)
OSCout
: CRYSTAL OSCILLATOR
P0 - P3
: DATA
LD
: LOCK DETECTOR
fp1, fp2
: fp1, fp2 MONITORING
fr2
: fr2 MONITORING
POWER SAV-
PS1
6
fin1
5
PS
8
OSCin
CRYSTAL
OSCILLATOR
10
OSCout
POWER SAV-
PS2
15
fin2
13
LE
12
Data
11
Clock
4-4
SET
2
CC
17-BIT LATCH (COMPARISONAL DIVISION)
fp1
MAIN COUNTER
PLL1
fr1
fr2
REFERENCE COUNTER
+1/+2
TS
SR
14-BIT LATCH (REFERENCIAL DIVISION)
17-BIT LATCH (COMPARISONAL DIVISION)
MAIN COUNTER
fp2
PLL2
P0
P1, 2, 3
10-BIT LATCH
LATCH SELECTOR
SHIFT REGISTER (21-BIT)
18
Vp
3
PHASE
CHARGE
Do1
ISET
CR1
LD1
19
P0
SELECTOR
P0/LD
LD2
OLA, B
fr2
9
P3/fr2
1
SELECTOR
P1/fp1
2
fp1
P2/fp2
fp2
17
PHASE
CHARGE
Do2
20
I
SET
CR2
OLA, B
CR1, 2
NJM78L12UA-TE1 (JRC)+12 V(0.1 A)
TA78L05F-TE12L (TOSHIBA)
POSITIVE VOLTAGE REGULATOR
—SIDE VIEW—
3
1
IN
OUT
GND
2
OUT
GND
IN
1
2
3
NJM79L12UA (JRC)_12 V (100 mA)
NJM79L12UA(TE1)
NEGATIVE VOLTAGE REGULATOR
—SIDE VIEW—
2
3
IN
OUT
COMMON
1
COMMON
IN
OUT
1
2
3
PST575EMT-T1 (MITSUMI)
SYSTEM RESETTING
—TOP VIEW—
GND
C
IN
4
3
+
_
1
2
V
OUT
CC
1
V
CC
+
+
_
_
3
C
IN
2
OUT
WRR-802A (U)
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