Chip Select - IDTECH SecureHead User Manual

Encrypted magnetic read head, spi interface with fpc
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SecureHead SPI Interface with FPC User Manual
About 20ms after receiving command, response is ready and DAV set to high. For some specific
commands, the delay will be longer.
About 20us after the last byte of response is read out by host, DAV is pulled low. So if user polls DAV
status to check whether there are data available, we suggest using 100us polling interval.

3.6. Chip Select

SPI interface allows connecting several SPI devices while master selects each of them with NCS (Chip
Select, Active Low). The device would only respond to SPCK and MOSI signals after a NCS is pulled
low. NCS needs to be low the whole time when the host is communicating with the particular device.
The Chip Select signal should be connected to ground if is not used by the host. Special case: in the
situation of clock phase = 1, NCS needs to generate a falling edge for each command.
Copyright © 2010-2013, International Technologies & Systems Corporation. All rights reserved.
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