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Document type:
Title:
User's Manual (MUT)
Mod. V812 16 Channel Constant Fraction Discriminator
Principles of operation
4.
4.1. The Constant Fraction Discrimination technique
The Constant Fraction Discrimination technique is based on summing a delayed, full height
input signal to an inverted and attenuated signal. The resulting signal is fed into a zero-crossing
comparator, thus obtaining a precise timing information that eliminates any walk errors induced
by constant rise time and varying amplitude signals.
For correct operation the maximum of the attenuated pulse has to cross the delayed pulse at
the selected fraction. This condition leads to the following relation:
where:
The Mod. V812 Constant Fraction Discriminator features a factory setting of 20% for the
fraction and 20 ns for the full scale delay. The delay can be selected in 4 ns steps up to 20 ns
4.2. Power ON / Reset Status
At Power ON the contents of all the module's registers are not determined. A setting of the
registers must be performed before any other operation.
4.3. Setting the Delay
For each channel, a 5-positions jumper allows to set the Delay according to the formula
expressed in § 4.1. The Delay values range up to 20 ns with a step of 4 ns; in order to gain
access to the jumpers it's necessary to unplug the relevant piggy back board (see for the
jumpers location on the V812 board). Factory setting is 20 ns. The fraction is a fixed 20% value.
4.4. Enabling/Disabling the channels
The User can enable or disable each of the 16 channels via VME by performing a VME write
access at Base address + %4A. A channel is enabled if the corresponding bit of the Pattern of
Inhibit is high (e. g., bin. 1111 1111 1111 0011, or hex FFF3, disables channels 2 and 3 of the
discriminator).
NPO:
00101/97:V812x.MUTx/04
∗ (1 - F)
T
= T
delay
rise
T
= selected delay on the Constant Fraction Discriminator
delay
T
= rise time of the input signals
rise
F = Constant Fraction value
Filename:
V812_REV4.DOC
Revision date:
Revision:
20/04/2009
4
Number of pages:
23
Page:
19
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