Concept - IMAGO VisionBox DAYTONA Hardware Manual

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2 Introduction
2.1

Concept

A Real-Time Communication Controller with vision- & automation-specific interfaces combined
with an embedded ARM processor and integrated GPU, this is the philosophy of the VisionBox
DAYTONA:
NVIDIA Tegra TX2 SoC
Quad-core ARM Cortex-A57 @ 2 GHz
o
Dual-core Denver 2 @ 2 GHz
o
GPU: NVIDIA Pascal
o
8 GB DDR4 RAM
o
32 GB eMMC
o
Real-Time Communication Controller – RTCC
Controls vision- & automation-specific interfaces:
o
Contains functional units for controlling I/Os in real time:
o
Operates independently from the OS & the processor
o
Easy-to-use high-level API for C++
o
Camera Interfacing:
Power-over-Ethernet: two independent Ethernet ports with PoE support
o
Trigger-over-Ethernet: Real-time trigger from RTCC with a µs-jitter
o
Digital I/Os:
Opto-isolated
o
Status LEDs
o
Inputs up to 5 MHz with debouncing in RTCC. Communicated to CPU via interrupt
o
or polling
Outputs up to 50 kHz
o
Housing
Passive cooling
o
24 VDC power input
o
No moving parts
o
Wireless communication
WIFI and Bluetooth integrated
o
LTE / 4G modem option
o
architecture with 256 CUDA cores
Digital I/Os
Encoder
Camera Trigger
Trigger unit: creation of trigger signals, derived from other inputs (e.g. en-
coder)
I/O Scheduler: applies values stored in a FIFO to outputs in real time (based
on trigger event, encoder position or timer value)
Multiplexer: Flexible connection of functional units
IMAGO Technologies GmbH
Strassheimer Str. 45; 61169 Friedberg - Germany; Tel. +49 6031-6842611
info@imago-technologies.com;
www.imago-technologies.com
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