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Broadcom ACPL-C740 User Manual
Broadcom ACPL-C740 User Manual

Broadcom ACPL-C740 User Manual

Evaluation kit board isolated sigma-delta modulator

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ACPL-C740 Evaluation Kit Board
Isolated Sigma-Delta Modulator
Description
The Broadcom ACPL-C740 isolated sigma-delta (Σ-Δ) modulator converts an analog input signal into a high-speed (20 MHz
typical) single-bit data stream by means of a sigma-delta over-sampling modulator. The time average of the modulator data
is directly proportional to the input signal voltage. The modulator uses an internal speed of 20 MHz. The modulator data are
encoded and transmitted across the isolation boundary where they are recovered and decoded into a high-speed data
stream of digital ones and zeros. The original signal information is represented by the density of ones in the data output.
The input signal information is contained in the modulator output data stream, represented by the density of ones and zeros.
The density of ones is proportional to the input signal voltage, as shown in
produces a data stream of ones 50% of the time and zeros 50% of the time. A differential input of –200 mV corresponds to
an 18.75% density of ones, and a differential input of +200 mV is represented by an 81.25% density of ones in the data
stream. A differential input of +320 mV or higher results in ideally all ones in the data stream, while an input of –320 mV or
lower results in all zeros, ideally.
Figure 1: Modulator Output vs. Analog Input
MODULATOR OUTPUT
ANALOG INPUT
Table 1: Input Voltage with Ideal Corresponding Density of 1s at Module Data Output, and ADC Code
Analog Input
+Full-Scale
+Recommended Input Range
Zero
–Recommended Input Range
–Full-Scale
Broadcom
Table 1
shows this relationship.
Voltage Input
Density of 1s
+320 mV
100%
+200 mV
81.25%
0 mV
50%
–200 mV
18.75%
–320 mV
0%
Figure
1. A differential input signal of 0V ideally
+FS (ANALOG INPUT)
0V (ANALOG INPUT)
–FS (ANALOG INPUT)
TIME
Density of 0s
ADC Code (16-bit unsigned decimation)
0%
65,535
18.75%
53,248
50%
32,768
81.25%
12,288
100%
0
User Guide
ACPL-C740-EvalKit-UG100
January 4, 2019

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Summary of Contents for Broadcom ACPL-C740

  • Page 1 Isolated Sigma-Delta Modulator Description The Broadcom ACPL-C740 isolated sigma-delta (Σ-Δ) modulator converts an analog input signal into a high-speed (20 MHz typical) single-bit data stream by means of a sigma-delta over-sampling modulator. The time average of the modulator data is directly proportional to the input signal voltage. The modulator uses an internal speed of 20 MHz. The modulator data are encoded and transmitted across the isolation boundary where they are recovered and decoded into a high-speed data stream of digital ones and zeros.
  • Page 2: Preparation And Setup

    A/D converter. With this conversion, the data rate of the word output is also reduced (decimation). A Sinc3 filter is recommended to work together with the ACPL-C740. With a 20-MHz internal clock frequency, 256 decimation ratio, and 16-bit word settings, the output data rate is 78 kHz (20 MHz/256). This filter can be implemented in an ASIC, FPGA, or DSP.
  • Page 3 Search button. If SW1 is not turned on, an error message appears, as shown below. Click OK and the application GUI appears. The message System not connected!! displays instead. 9. Switch on SW1. Go to the application GUI, and click Search. Now, the message changes to Broadcom-System to indicate that the connection is established.
  • Page 4 ACPL-C740 Evaluation Kit Board User Guide Isolated Sigma-Delta Modulator Application GUI The application GUI has three displays: two showing the signal in the time domain and frequency domain, and a third showing SNR and SNDR historical plots. The time domain signal can be displayed in terms of ADC count or voltage level (mV) by checking the Display (mV).
  • Page 5 If maximum RMS current through the motor = 30A, 20% overloads during normal operation, then, peak current is 51A (30 × 1.414 × 1.2). The recommended maximum input voltage for ACPL-C740 is ±200 mV. Shunt resistor value = V/I = 200 mV/51A ≈ 4 mΩ...
  • Page 6 – The decimation ratio, which can be set at the application GUI to 256, 128, or 64. – The input signal level. The ACPL-C740 recommended input voltage range is from –200 mV to 200 mV. To achieve the best SNR/SNDR, design the maximum input signal range nearest ±200 mV (using the selection of the input current range and shunt resistor value).
  • Page 7  evaluation board. A more accurate method to measure the performance of the ACPL-C740 evaluation board is to connect a 1-shunt resistor, then supply the voltage signal from a function generator that can drive sufficient current through the 1-shunt resistor until an input signal level of ±200 mV is reached. One such function generator is the ultra low distortion DS360 function generator from Standford Research Systems.
  • Page 8 100 pF, which results in a switching frequency of around 200 kHz. This frequency is outside the operating bandwidth of the ACPL-C740 sigma-delta modulator and the Sinc3 filter FFT bandwidth used for filtering and decimating the sigma-delta bitstream from the ACPL-C740.
  • Page 9: Troubleshooting

    Note that R18 must be removed on the FPGA-EVBD board. 3. Green LED1–4 signals the detection of ACPL-C740. To modify the FPGA, use these LED indicators for other functions. 4. The H1 and H2 connector pins are physically connected to the FPGA. To modify the FPGA, use these connector pins for input (I/P) or input/output (I/O).
  • Page 10 ACPL-C740 Evaluation Kit Board User Guide Isolated Sigma-Delta Modulator Figure 7: PCB Description 1.2V Regulator 3.3V 2.5V Regulator Regulator C740-SDM-EVBD Schematic Diagram Figure 8: C740-SDM-EVBD Schematic Diagram 100 pF GND2 Vdd1 1:1.3 VOUT MBR0520L PE22100 10 uF 0.1 uF 1 uF...
  • Page 11 ACPL-C740 Evaluation Kit Board User Guide Isolated Sigma-Delta Modulator C740-SDM-EVBD PCB Layout Figure 9: C740-SDM-EVBD PCB Top Layer Figure 10: C740-SDM-EVBD PCB Second Layer Broadcom ACPL-C740-EvalKit-UG100...
  • Page 12 ACPL-C740 Evaluation Kit Board User Guide Isolated Sigma-Delta Modulator Figure 11: C740-SDM-EVBD PCB Third Layer Figure 12: C740-SDM-EVBD PCB Bottom Layer Broadcom ACPL-C740-EvalKit-UG100...
  • Page 13 ACPL-C740 Evaluation Kit Board User Guide Isolated Sigma-Delta Modulator FPGA-EVBD Schematic Diagram Figure 13: FPGA-EVBD Schematic Diagram (Part 1) EG1218 500mA 240-2390-2 MI0805K601R-10 5VCC IRLML6402 5VIN VCCSW 0.01 uF 0.1 uF 0.1 uF 0.1 uF GND2 GND2 GND2 GND2 GND2...
  • Page 14 ACPL-C740 Evaluation Kit Board User Guide Isolated Sigma-Delta Modulator Figure 14: FPGA-EVBD Schematic Diagram (Part 2) 3V3X 3.3V REGULATOR 200 m A Maximum 4.7K VCCSW 3V3X 4.7K SRAM_A0 JTAG_TCK IO_L01P_3 JTAG_TCK SRAM_A1 JTAG_TMS IO_L01N_3 JTAG_TMS SRAM_A2 JTAG_DIN IO_L02P_3 JTAG_TDI JTAG_DOUT 0.1 uF...
  • Page 15 ACPL-C740 Evaluation Kit Board User Guide Isolated Sigma-Delta Modulator FPGA-EVBD PCB Layout Figure 15: FPGA-EVBD PCB Top Layer Figure 16: FPGA-EVBD PCB Second Layer Broadcom ACPL-C740-EvalKit-UG100...
  • Page 16 ACPL-C740 Evaluation Kit Board User Guide Isolated Sigma-Delta Modulator Figure 17: FPGA-EVBD PCB Third Layer Figure 18: FPGA-EVBD PCB Bottom Layer Broadcom ACPL-C740-EvalKit-UG100...
  • Page 17 The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. For more information, please visit www.broadcom.com. Broadcom reserves the right to make changes without further notice to any products or data herein to improve reliability, function, or design. Information furnished by Broadcom is believed to be accurate and reliable. However, Broadcom does not assume any liability arising out of the application or use of this information, nor the application or use of any product or circuit described herein, neither does it convey any license under its patent rights nor the rights of others.