LG D722K Service Manual page 169

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<2-1-3-3-1_MSM8926_DATA>
Release Date
Based on Reference Schematic
80-NE925-41_MSM8926_BASEBAND_PRELIMINARY_REFERENCE_SCHEMATIC_BA
If you use 3die, 4die LPDDR,
change to 240 ohm 1% resistor.
Note 9
DDR RF Desense Issue _ 533MHz
CASE 1. WTR1625L + WFR1620 (APAC-CA, NA-EU-CA)
L 2100 - L 2107 are needed
Note 6 : WTR0 uses CH0 & CH2
Note 6
WTR1(or WFR) uses CH1 & CH3
Note 9
L2100
120n
WFR0_PRXBB_I_N
L2101
120n
WFR0_PRXBB_I_P
L2102
120n
WFR0_PRXBB_Q_N
L2103
120n
WFR0_PRXBB_Q_P
Note 1 : If you don't use BBRX_CH1, 3 pin,
Note 1
these pin must be floated.
L2104
120n
WFR0_DRXBB_I_N
L2105
120n
WFR0_DRXBB_I_P
L2106
120n
WFR0_DRXBB_Q_N
L2107
120n
WFR0_DRXBB_Q_P
Note 2
PIN
WCN using
BCM using
3.9k
R2110
DNI
IQ line
connect to WCN
GND
Note 10
DDR RF Desense Issue _ 533MHz
CASE 2. WTR16x5L + WTR2100 (SGLTE/DSDA)
L2110, L2111 are needed. TX_DAC_IM and IP are connected to GND.
CASE 3. WTR1605L + WTR2100/WTR2605 (Single Sku CT-SVLTE and SGLTE)
L21108, L2109, L2110, L2111 are needed
C2102
DNI
+1V9_VREG_L7
Note 10
LGE Internal Use Only
CCDS CARD Information
2013.11.12
Rev.BA
USB_D_M
MSM_USB_ID
USB_D_P
Deleted at B
TP2103
R2100
TOL=0.01
Note 8
Note 8
R2101
TOL=0.01
R2103
TOL=0.01
R2105
0
VREF_LPDDR2
VREF_LDO_MPP_3
TP2102 deleted at B
BB_CLK
BB_CLK_EN
TP2105
SLEEP_CLK
WTR0_PRXBB_I_N
WTR0_PRXBB_I_P
WTR0_PRXBB_Q_N
WTR0_PRXBB_Q_P
WTR0_DRXBB_I_N
WTR0_DRXBB_I_P
WTR0_DRXBB_Q_N
WTR0_DRXBB_Q_P
R2117
Note 2
0
GND
WTR0_TXBB_I_N
WTR0_TXBB_I_P
WTR0_TXBB_Q_N
WTR0_TXBB_Q_P
WTR0_DAC_IREF
VREF_LDO_MPP_3
GND
DNI
R2112
WTR0_GNSSBB_I_P
Note 7
WTR0_GNSSBB_I_N
WTR0_GNSSBB_Q_P
WTR0_GNSSBB_Q_N
Note 7
ET/APT
R2111
R2112
CSFB, CA
ET Unused
DNI
0 ohms
CSFB, CA
ET Used
0 ohm
DNI
SVLTE
ET Unused
0 ohm
DNI
SVLTE
ET Used
0 ohm
DNI
U2100
MSM8926-2
F21
AT31
USB_HS2_DM
SRST_N
JTAG_SRST
E22
AN34
USB_HS2_DP
TCK
JTAG_TCK
D23
AY35
USB_HS2_ID
TDI
JTAG_TDI
AR32
TDO
JTAG_TDO
G24
AW34
USB_HS2_VBUS
TMS
JTAG_TMS
AP33
JTAG_TRST
TRST_N
B25
GND1
D33
RESIN_N
MSM_RESIN_N
A22
E32
200
USB_HS2_REXT
RESOUT_N
MSM_RESOUT_N
AM9
AU32
240
EBI0_CAL_REXT
MODE_0
R2102
DNI
AD1
AV31
R2002 and R2004 are needed only for BSCAN mode.
240
R2104
DNI
EBI0_ZQ0
MODE_1
AY19
EBI0_ZQ1
C34
PS_HOLD
MSM_PS_HOLD
Y39
VREF_DQ
AC2
F1
VREF_CA
SDC1_CLK
G6
SDC1_CMD
eMMC_CMD
AF33
F3
EBI0_VREF_D0
SDC1_DATA_0
eMMC_DATA_0
P33
E2
EBI0_VREF_D1
SDC1_DATA_1
eMMC_DATA_1
AM29
G4
EBI0_VREF_D2
SDC1_DATA_2
eMMC_DATA_2
J30
J2
EBI0_VREF_D3
SDC1_DATA_3
eMMC_DATA_3
AN10
E4
EBI0_VREF_CA
SDC1_DATA_4
eMMC_DATA_4
D1
SDC1_DATA_5
eMMC_DATA_5
U6
G2
VREF_APC_MPM
SDC1_DATA_6
eMMC_DATA_6
K1
SDC1_DATA_7
eMMC_DATA_7
P37
GND2
G20
M3
USB_HS2_SYSCLK
QDSS_SDC2_TRCLK/SDC2_CLK
L6
L4
SDCARD_CMD
CXO
QDSS_SDC2_TRSYNC/SDC2_CMD
B27
M5
SDCARD_DATA_0
CXO_EN
QDSS_SDC2_TRDATA_0/SDC2_DATA_0
B35
L2
SLEEP_CLK
QDSS_SDC2_TRDATA_1/SDC2_DATA_1
SDCARD_DATA_1
M1
QDSS_SDC2_TRDATA_2/SDC2_DATA_2
SDCARD_DATA_2
AG2
P1
BBRX_CH0_IM
QDSS_SDC2_TRDATA_0/SDC2_DATA_3
SDCARD_DATA_3
AH1
BBRX_CH0_IP
AG4
G28
BBRX_CH0_QM
PMIC_SPMI_CLK
PMIC_SPMI_CLK
AG6
D27
BBRX_CH0_QP
PMIC_SPMI_DATA
PMIC_SPMI_DATA
AF5
BBRX_CH1_IM
AF3
AU26
BBRX_CH1_IP
MIPI_CSI0_LN0_N
MAIN_CAM0_MIPI_DATA0_N
AF1
AR26
BBRX_CH1_QM
MIPI_CSI0_LN0_P
MAIN_CAM0_MIPI_DATA0_P
AE2
AY25
BBRX_CH1_QP
MIPI_CSI0_LN1_N/MIPI_CSI0_CLK_N
MAIN_CAM0_MIPI_CLK_N
AJ4
AW26
BBRX_CH2_IM
MIPI_CSI0_LN1_P/MIPI_CSI0_CLK_P
MAIN_CAM0_MIPI_CLK_P
AJ6
AP23
BBRX_CH2_IP
MIPI_CSI0_LN2_N
MAIN_CAM0_MIPI_DATA1_N
AH5
AN24
BBRX_CH2_QM
MIPI_CSI0_LN2_P
MAIN_CAM0_MIPI_DATA1_P
AH3
AY23
BBRX_CH2_QP
MIPI_CSI0_LN3_N
AK3
AW22
BBRX_CH3_IM
MIPI_CSI0_LN3_P
AL4
AU22
BBRX_CH3_IP
MIPI_CSI0_LN4_N
AK1
AR22
BBRX_CH3_QM
MIPI_CSI0_LN4_P
AL2
BBRX_CH3_QP
AV27
MIPI_CSI1_LN0_N
VT_CAM_MIPI_DATA0_N
U32
AT27
WLAN_REXT
MIPI_CSI1_LN0_P
VT_CAM_MIPI_DATA0_P
U34
AY27
VT_CAM_MIPI_CLK_N
WLAN_BB_IM
MIPI_CSI1_LN1_N/MIPI_CSI1_CLK_N
V35
AW28
VT_CAM_MIPI_CLK_P
WLAN_BB_IP
MIPI_CSI1_LN1_P/MIPI_CSI1__CLK_P
P35
WLAN_BB_QM
R34
AV17
WLAN_BB_QP
MIPI_DSI0_CLK_N
LCD_MIPI_CLK_N
AT17
MIPI_DSI0_CLK_P
LCD_MIPI_CLK_P
AC4
AT21
ET_DAC_M
MIPI_DSI0_LN0_N
LCD_MIPI_DATA0_N
AA4
AV21
ET_DAC_P
MIPI_DSI0_LN0_P
LCD_MIPI_DATA0_P
AP19
MIPI_DSI0_LN1_N
LCD_MIPI_DATA1_N
AB5
AR20
LCD_MIPI_DATA1_P
TX_DAC0_IM
MIPI_DSI0_LN1_P
AB3
AY15
TX_DAC0_IP
MIPI_DSI0_LN2_N
Y1
AW14
TX_DAC0_QM
MIPI_DSI0_LN2_P
W2
AR16
TX_DAC0_QP
MIPI_DSI0_LN3_N
AA6
AU16
TX_DAC0_IREF
MIPI_DSI0_LN3_P
V5
TX_DAC0_VREF
AD3
TX_DAC1_IM
AD5
TX_DAC1_IP
AD7
TX_DAC1_QM
AC6
TX_DAC1_QP
AE8
TX_DAC1_IREF
AC8
TX_DAC1_VREF
AN4
GNSS_BB_IP
AM3
GNSS_BB_IM
AR4
GNSS_BB_QP
AP3
GNSS_BB_QM
- 169 -
Rev_0.7
JTAG_TCK
JTAG_TDO
TP2106
JTAG_TDI
JTAG_TMS
+1V8_VREG_L6
JTAG_TRST
TP2101
Note 4
R2106
0
eMMC_CLK
Note 4
Do not delete R2106, It can be changed value for tunning.
It is recommend R2106 is located at MSM side
Note 5
R2108
0
SDCARD_CLK
Note 5
Do not delete R2108, It can be changed value for tunning.
It is recommend R2108 is located at MSN side
MAIN_CAM0_MIPI_DATA2_N
MAIN_CAM0_MIPI_DATA2_P
MAIN_CAM0_MIPI_DATA3_N
MAIN_CAM0_MIPI_DATA3_P
LCD_MIPI_DATA2_N
LCD_MIPI_DATA2_P
< 3-1-2-3-1_LPDDR2_PoP_8Gbit_SK_Hynix >
LCD_MIPI_DATA3_N
LCD_MIPI_DATA3_P
POP_8Gb 168ball 533MHz (38nm, 4Gb x 2), Hynix
Rev_1.0
6. CIRCUIT DIAGRAM
< 9-3-1_JTAG >
Rev_0.4
+1V8_VREG_L6
CN9300
1
14
MSM_UART_TX
2
13
TP9300
MSM_UART_RX
3
12
4
11
5
10
6
9
JTAG_PS_HOLD
7
8
JTAG_SRST
C2107
100n
U3100
H9TKNNN8JDAPLR-NGH
1
Fiducial1
Copyright © 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes

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