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The TAS5414C-Q1 and TAS5424C-Q1 devices are 4-channel class-D amplifiers in one integrated circuit
(IC). The devices were developed for automotive use and are qualified in accordance with the AECQ100
specification. When designing the control code to operate the TAS5414B, TAS524B, TAS5414C,
TAS5424C, and TAS5412 devices through I
account for proper system function. This design guide includes software development guidelines as well
as hardware instructions to provide the necessary circuit topologies and part types to meet strict OEM-
audio specifications and the EMI standards of CISPR25.
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Copyright © 2014, Texas Instruments Incorporated
TAS54x4C Design Guide
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C, the unique device characteristics must be taken into
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List of Figures
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Developer's Guide
SLOA196 - June 2014
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Table of Contents
Related Manuals for Texas Instruments TAS54 4C Series
Summary of Contents for Texas Instruments TAS54 4C Series
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Page 1: Table Of Contents
CLIP_OTW Pin Voltage Versus % of THD ..............Load-Diagnostic Output-Waveforms Timing Diagram ......Channel 1 → Channel 3 Harmonic Crosstalk With Default Switching Phase Settings ..................THD+N vs Frequency Improvements SLOA196 – June 2014 TAS54x4C Design Guide Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated... - Page 2 Mode Summary, Excluding Faults List of Tables ................Oscillator Configuration and I C Addresses ............Recommended Switching Frequencies for AM Mode Operation ....................Load Diagnostic Timing TAS54x4C Design Guide SLOA196 – June 2014 Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated...
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Page 3: Tas54X4C Hardware Design Guidelines
1 µF 499 499 In_P 1, 2, 3, 4 Audio Source 1200 pF 250 In_M 4 µF Figure 1. TAS5414C Input Circuit SLOA196 – June 2014 TAS54x4C Design Guide Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated... -
Page 4: C Communication
The TAS5414C and TAS5424C devices have the capability to receive and send sequential data. All registers can be read sequentially except the fault registers. All registers with write capabilities can be written sequentially. TAS54x4C Design Guide SLOA196 – June 2014 Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated... -
Page 5: Oscillator
The inverter allows a new sync pulse between each of the devices to align the 45° or 180° switching phases. To summarize, two options occur between the OSC_SYNC pin and synchronization of the devices. SLOA196 – June 2014 TAS54x4C Design Guide Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated... -
Page 6: Clock Synchronization Options
C addresses in a system and an external clock, a special I C register bit is available that allows the master address to use an external clock. In register 0x0B, set bit D6 to 1. TAS54x4C Design Guide SLOA196 – June 2014 Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated... -
Page 7: Output
TAS54x4C devices the output stages are BTL so the demodulation filter must be a fully balanced filter. Another issue regarding the recovery of a quality audio signal is overshoot on the PWM signal. Overshoot can be reduced using snubbers. SLOA196 – June 2014 TAS54x4C Design Guide Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated... -
Page 8: One-Half Of The Typical Output Stage With Snubbers
Rx or a smaller capacitor for Cx. The final Cx should be labeled as C1 and the ringing frequency is ƒ1. TAS54x4C Design Guide SLOA196 – June 2014 Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated... -
Page 9: Typical Output Demodulation Filter
L, and the difference mode capacitor, CDM. The two common mode capacitors, CCM, filter any common mode signals from the switching waveform. (CM) (DM) Load (R (CM) Figure 4. Typical Output Demodulation Filter SLOA196 – June 2014 TAS54x4C Design Guide Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated... -
Page 10: Component Selection
Moderate Q 2 µH Core Saturation Low Q 1 µH 10 A Current and Q factor (A) Figure 5. Inductance Versus Current and Q Factor TAS54x4C Design Guide SLOA196 – June 2014 Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated... - Page 11 Ceramic capacitors with X7R materials function just as well as film capacitors over voltage and temperature and have a much better cost and size. SLOA196 – June 2014 TAS54x4C Design Guide Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated...
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Page 12: Protection
C. This second method occurs if either amplifier output, post LC filter, is shorted to the PVDD pin or ground. This protection is not ensured if the IC output pin is shorted to the PVDD pin or ground. TAS54x4C Design Guide SLOA196 – June 2014 Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated... -
Page 13: Load Diagnostics
The open load would be detected after the short to ground was fixed and another load diagnostic was run. Figure 7 shows the load diagnostic waveform according to the TAS54x4C data sheet. SLOA196 – June 2014 TAS54x4C Design Guide Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated... -
Page 14: Load-Diagnostic Output-Waveforms Timing Diagram
(open load) and in Phase 4 (shorted load) are highly load dependent, and may have a greatly decreased amplitude compared to those shown in Figure 7 when a load is properly connected. TAS54x4C Design Guide SLOA196 – June 2014 Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated... -
Page 15: Power Supply
FETS do not try to function without the charge pump voltage, so an AVDDUV fault will be present in the I C fault registers. SLOA196 – June 2014 TAS54x4C Design Guide Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated... -
Page 16: Emi And Pcb Layout Considerations
If they are not grounded at the same point the common mode EMI reduction is decreased. TAS54x4C Design Guide SLOA196 – June 2014 Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated... -
Page 17: Paralleling Outputs
The transition time from 0 V to 3.3 V and from 3.3 V to 0 V should be less than 25 µs. SLOA196 – June 2014 TAS54x4C Design Guide Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated... -
Page 18: Line Output
Any audio system in which this switching phase change is made should be EMC tested with this change implemented to ensure that all EMC requirements are met. TAS54x4C Design Guide SLOA196 – June 2014 Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated... -
Page 19: Thd+N Versus Frequency
= 14.4 V = 4 Ω = 1 W (PVDD) = 25°C Figure 9. THD+N vs Frequency Improvements SLOA196 – June 2014 TAS54x4C Design Guide Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated... -
Page 20: Tas54X4C Software Design Guidelines
C commands to transition to hi-Z mode the device is unable to transition between states because the ramps are prevented until the emergency mute is released. TAS54x4C Design Guide SLOA196 – June 2014 Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated... -
Page 21: Power Up And Initialization
If load diagnostics found a channel to have a load issue, not turning on that channel may be desired. Hi-Z mode Figure 10. Power Up and Initialization SLOA196 – June 2014 TAS54x4C Design Guide Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated... -
Page 22: Using The Device To Play Music
Play mode from MUTE to PLAY that takes 90 ms to complete. PLAY mode is reached when register 0x06 is 0x0F. Figure 11. Turnon flowchart TAS54x4C Design Guide SLOA196 – June 2014 Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated... -
Page 23: Using The Device To Stop Playing Musing
LOW-LOW for 5 ms before continuing. Hi-Z mode is reached when Hi-Z mode register 0x05 is 0x0F. Figure 12. Turnoff Flowchart SLOA196 – June 2014 TAS54x4C Design Guide Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated... -
Page 24: Load Diagnostics
0x03 test. A value of 0x00 indicates that all tests pass. Figure 13. Load Diagnostics, Four Channels TAS54x4C Design Guide SLOA196 – June 2014 Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated... -
Page 25: Fault Handling
(see note A). Is the value in 0x04, 0x00? See note B. Optionally run load diagnostics Hi-Z mode Figure 14. Global Fault Handling SLOA196 – June 2014 TAS54x4C Design Guide Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated... -
Page 26: Device Mode Summary
Play mode 0x05 0x00 | 0x06 0x0F | 0x07 0x00 Status register values are shown in blue text. Figure 16. Mode Summary, Excluding Faults TAS54x4C Design Guide SLOA196 – June 2014 Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated... - Page 27 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue.
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