Tektronix TDS520 Diagnostic And Repair Manual page 73

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This procedure assumes
that
the DRAM
is not
programmed until the
cpuDRAMmem is run .
Run the
cpuDRAMmem
diagnostic. Does It
pass?
No
Run the cpuDRAMmem
diagnostic in a loop. Repai r any
errors on
the
address lines
into
and oUlm UtltO.
The DRAM might
not
be reset
on power up. Trigger on UtllO
pin
33
going
high
and probe
U11lQ pin
58. Cycle
power.
Are
the
waveforms similar No .
to the ones in
Figure 9-75?
Set
SH)()l to
0010
0000 and
cycle power. Is
U1110 pin 52
.,."
y~
Trigger on U1 1 10 pin 48
going high. Run the
cpuDRAMmem in a loop
thaI ignores errors.
Is there a
bigger?
No
There is nothing
wrong with
UntO and
Ut t IS- UII2S.
Is the
connection
between 03 pin 3
and Uttl O pin 58
ok?
Perform the Reset
troubleshooting
procedure.
Check and repair
U",4 pinG 8-13.
Check and repair
Ul055 pin,O and
assOCiated circuitry.
N O '--""
Repair the
connection.
TDS 520 Component Level Diagnostic and Repair Manual
Trigger on U" , O pin 48 going high
and probe U11 10 pin 52 (you will
need to cycle power between the
next two measurements)
Doe,
Scans by Artekmedia:> 2011
the rising edge of
Ul1 10
pin
52 coincide
with the
trigger and
then stay
No
Check and
repalrU1114
pins 8-13.
high?
y"
Trigger on Ul' 10 pin 48 going
low. Cycle
power
and
run
the
cpuDRAMmem.
I,
there at least Yes
65 ms between the
first
end
second
triggers?
No
Run
the
cpuDRAMlnit in a loop. This
diagnostic loops on writing a valid
programming address to Ul1 10
Trigger 00 Ul1 10 pin 48 going high.
Usl""
Table 6-5, is the
address on Ul110
pins 8- 25 and 32
valid for the
DRAM?
No
Run the Yes
r:::--:--.,---,..,-:-::-::-
cpuDiagDuartALoopBack Check
and
repair U1317
Check fC)( stuck-ais and signals tied
together
on thE
address bus
attached 10
U1110 pins 8-25
and
32. Run the
cput-NRamTest to repair any problems
with
the address
lines. test. Does and associated circuitry.
It fail?
No
Perform the 10 Register
troubleshooting
procedure.
Perform the 10 Register troubleshooting
procedure
to be
sure
that
the
A11 DRAM
Processor/Display
Is
configured as
specified by the 1 0 number.
Cycle
power
and run the
cpuDRAMmem in a loop that
ignores errors. Compare the
signals on UtllO 10 those in
Figure 9-76.
Are the Yes
signals the
same?
No
Repair any
problems fo und.
Compare
the signals from
the UtllO to those
in Figure 9-77. Are
they the
same?
No
Repair any problems
found. Also, check
and
repair UI' l U.
Check Ul11S-U tt25for
fau'ty address lines and/or
bad memory parts.
Vol. 2 Figure 9·74: DRAM Control Troubleshooting Procedure
All DRAM Processor/Display
Vol. 2 9-62