Schematics - Segger J-Link-OB-STM32F103 User Manual

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Chapter 5

Schematics

1
VCC3
Target MCU
(See manual for
connection of
A
target signals)
TRST
nTRST
TDI
TDI
TMS
TMS/SWDIO
TCK
TCK/SWCLK
TDOin
TDO/SWO
nRESET
VCC3
Supply
3.3V
C1
100n
B
GND
May be used to supply
V5
GND
5V to the board.
VBUS
GND
USB
J1
S1
Shield1
1
Vbus
2
D-
3
D+
4
GND
GND
S2
C
Shield2
USB_BP
C6
10n
GND
History / Changes
Rev. 1.0:
Inital version
Rev. 1.1:
J2 added, R3,R4,R5,R6,R7 changed to 130 Ohm
Rev. 1.2:
R13, R14, R15 removed
Rev. 1.3:
Changed MCU connections to allow use of 36 pin package
Added programming connector J3, added C11
D
Removed U1, C9, C10
Rev. 1.4:
Extended target signal naming for SWD, added note
Rev. 1.5:
Moved TDOin from PA6 to PA10
1
J-Link-OB-STM32F103 User Guide (UM08023)
2
R2
D1
LED
220R
VCC3
LTST-C170KGKT
R3
TRSTout
130R
R4
TDIout
130R
R5
TMSout
130R
R6
TCKout
130R
TDOin
R7
TRESout
130R
VDD, VDDA decoupling
C2
C3
C4
C5
100n
100n
100n
100n
C7
XIN
R8
22p*
X1
1M*
8MHz
C8
XOUT
22p*
* values depend on selected crystal and layout
R9
DDM
22R
DDP
22R
R10
R11
GND
ATTACH
1k5
2
U2
10
TRSTout
PA0-WKUP
11
TRESout
PA1
TDIout
12
PA2
PB2/BOOT1
13
PA3
PB3/JTDO
14
PA4
PB4/JNTRST
15
TCKout
PA5
16
PA6
17
TMSout
PA7
29
LED
PA8
30
ATTACH
PA9
31
TDOin
PA10
DDM
32
PA11
DDP
33
PA12
TMSS
34
PA13/JTMS/SWDIO
37
TCKS
PA14/JTCK/SWCLK
38
TDIS
PA15/JTDI
5
XIN
OSC_IN/PD0
PC13-TAMPER-RTC
6
XOUT
OSC_OUT/PD1
PC14-OSC32_IN
PC15-OSC32_OUT
44
GND
BOOT0
7
RESET
NRST
*
1
VCC3
VBAT
C11
100n
24
VCC3
VDD_1
36
VDD_2
48
VDD_3
9
VDDA
STM32F103CBT6
* Note:
Pins PB8-15, PC13-15, and VBAT are not present in
VFQFPN36 package.
© 2004-2017 SEGGER Microcontroller GmbH
3
JTAG Selection
Optional "JTAG Disable" jumper.
If JTAG-Disable is not needed, leave PB5 open.
18
PB5
PB0
19
PB1
JTAG Disable
20
GND
39
TDOS
40
TRSTS
41
PB5
42
PB6
43
PB7
JTAG on board programming connector
45
*
PB8
Tag-Connect connector for SEGGER J-Link with
46
*
J-Link adapter from SEGGER allows supply of the
PB9
21
*
target board (V5) during programming and
PB10
*
22
PB11
debugging.
*
25
PB12
26
*
PB13
27
*
PB14
VCC3
28
*
TMSS
PB15
GND
2
*
TCKS
3
*
V5
4
*
TDOS
TDIS
TRSTS
RESET
23
VSS_1
35
VSS_2
47
VSS_3
8
VSSA
GND
History / Changes
(see left)
Title
J-Link-OB-STM32F103
Size
Number
A4
-
06.11.2013
Date:
File:
J_Link_OB_STM32F103_Rev1.5.SchDoc
3
4
A
J2
GND
B
J3
RESET
1
10
TRSTS
2
9
TDIS
3
8
4
7
TDOS
5
6
TC2050-IDC
C
SEG G ER
J-Link
TM
Technology
www.segger.com
D
Revision
Rev. 1.5
/
Sheet
1
1
Drawn:
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