Related Manuals for Segger J-Link-OB-STM32F103
Summary of Contents for Segger J-Link-OB-STM32F103
- Page 1 J-Link-OB- STM32F103 User guide of the onboard debug probe based on STM32F103 MCU Document: UM08023 Revision: 1 Date: January 18, 2018 A product of SEGGER Microcontroller GmbH www.segger.com...
- Page 2 While the information herein is assumed to be accurate, SEGGER Microcontroller GmbH (SEG- GER) assumes no responsibility for any errors or omissions. SEGGER makes and you receive no warranties or conditions, express, implied, statutory or in any communication with you. SEGGER specifically disclaims any implied warranty of merchantability or fitness for a particular purpose.
- Page 3 Contact us for further information on topics that are not yet documented. Print date: January 18, 2018 Manual Revision Date Description version Initial Version 0.00 171012 J-Link-OB-STM32F103 User Guide (UM08023) © 2004-2017 SEGGER Microcontroller GmbH...
- Page 4 J-Link-OB-STM32F103 User Guide (UM08023) © 2004-2017 SEGGER Microcontroller GmbH...
- Page 5 Sample Comments in program examples. Sample comment Reference to chapters, sections, tables and figures or other doc- Reference uments. GUIElement Buttons, dialog boxes, menu names, menu commands. Emphasis Very important sections. J-Link-OB-STM32F103 User Guide (UM08023) © 2004-2017 SEGGER Microcontroller GmbH...
- Page 6 J-Link-OB-STM32F103 User Guide (UM08023) © 2004-2017 SEGGER Microcontroller GmbH...
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Page 7: Table Of Contents
Supported target CPU cores ..................9 Supported target interfaces ..................10 Target interface pins ..................11 Target interface JTAG ................... 12 Target interface SWD ..................13 Compatible MCUs as J-Link OB host .................14 Schematics ........................15 Glossary ........................16 J-Link-OB-STM32F103 User Guide (UM08023) © 2004-2017 SEGGER Microcontroller GmbH... -
Page 8: Why J-Link Ob
J-Links and can be used with the same utilities (as far as the feature set of the J-Link OB supports this) Note It is not allowed to use J-Link-OB-STM32F103 for stand-alone emulators. J-Link-OB-STM32F103 User Guide (UM08023) © 2004-2017 SEGGER Microcontroller GmbH... -
Page 9: Supported Target Cpu Cores
Chapter 2 Supported target CPU cores For a list of cores supported by this J-Link OB model, please refer to here: J-Link OB Model overview J-Link-OB-STM32F103 User Guide (UM08023) © 2004-2017 SEGGER Microcontroller GmbH... -
Page 10: Supported Target Interfaces
Chapter 3 Supported target interfaces The J-Link-OB-STM32F103 supports the following target interfaces: • JTAG • SWD (+ SWO) It may therefore be used for ARM7/9 target CPUs or other target CPUs with JTAG connection or Cortex-M targets with JTAG or Serial Wire Debug connection. -
Page 11: Target Interface Pins
CHAPTER 3 Target interface pins Target interface pins The J-Link-OB-STM32F103 provides the following target interface signals: • TCK/SWCLK (PA5 / Pin 15) • TMS/SWDIO (PA7 / Pin 17) • TDI (PA2 / Pin 12) • TDO/SWO (PA10 / Pin 31) •... -
Page 12: Target Interface Jtag
Note TCK and TMS share functionality with the SWCLK and SWDIO pins used for the SWD interface. So if JTAG connected on the J-Link OB, SWD is supported automatically as well. J-Link-OB-STM32F103 User Guide (UM08023) © 2004-2017 SEGGER Microcontroller GmbH... -
Page 13: Target Interface Swd
#RESET (PA1 / Pin 11) If SWO support is not required (e.g. when the target CPU is Cortex-M0/M0+ based, which does not provide SWO support), the SWO signal can be left open. J-Link-OB-STM32F103 User Guide (UM08023) © 2004-2017 SEGGER Microcontroller GmbH... -
Page 14: Compatible Mcus As J-Link Ob Host
Chapter 4 Compatible MCUs as J-Link OB host The J-Link-OB-STM32F103 is based on the ST STM32 F103 72 MHz, 128 KB flash, 20 KB RAM series MCUs. The following microcontrollers are compatible to this J-Link OB model: • STM32F103CB (LQFP48, UFQPN48, VFQFPN48) •... -
Page 15: Schematics
TMSout JTAG on board programming connector Tag-Connect connector for SEGGER J-Link with 100n 100n 100n 100n 100n ATTACH J-Link adapter from SEGGER allows supply of the TDOin target board (V5) during programming and PA10 PB10 PA11 PB11 debugging. PA12 PB12... -
Page 16: Glossary
Chapter 6 Glossary This chapter describes important terms used throughout this manual. J-Link-OB-STM32F103 User Guide (UM08023) © 2004-2017 SEGGER Microcontroller GmbH... - Page 17 The electronic signal which times data on the SWDIO data line used in serial wire debug mode. The SWCLK pin is typically the TCK pin used as JTAG clock input, when JTAG is also supported by the device. J-Link-OB-STM32F103 User Guide (UM08023) © 2004-2017 SEGGER Microcontroller GmbH...
- Page 18 OB-STM32F103 is able to receive the data in asynchronous mode when SWO of the target CPU is connected to the SWOin signal of J-Link-OB-STM32F103. Normally the SWO output signal of a Cortex-M CPU is directed via the TDO signal pin, but may be separated on some devices.
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