LG CU920 Manual page 177

7. CIRCUIT DIAGRAM
1 2 3
A
B
C
R909
CN803 15nH
1
L911
D
2p
C935
NA
E
F
EBI2_DATA(0:15)
C
D
E
F
1 2 3
Copyright © 2008 LG Electronics. Inc. All right reserved.
Only for training and service purposes
4 5 6 7
VREG_MFLO_2.6V
ANT900
WFL-R-SMT10
ANT G3 G1
L910
G2 G2
5.6nH FL900 B9036
G1 G3 ANT
IN OUT
GND1 GND2
WFL-R-SMT10
ANT901
C908
L902
1.2p
22nH
87
NC4
88 58
A2[3]
A3 DNC19
89 57
A2[4]
A4 VDD_A0
90 56
A2[2] A2 DNC20
91 55
A2[1] A1 TCXO
92 54
EBI2_DATA(15)
D15 DNC21
93 53
EBI2_DATA(13) D13 GND1
94 52
EBI2_DATA(14) D14 GND2
95 51
EBI2_DATA(12) D12 DNC22
96 50
EBI2_DATA(9) D9 VDD_C3
97 49
EBI2_DATA(10)
D10 DNC23
98 48
EBI2_DATA(8)
D8 DNC24
99 47
VDD_E1 SLEEP_CLK
100 46
EBI2_OE_N OE_N U901 VDD_P3
101 45
VDD_C6 DNC25
MBD1000
102 44
EBI2_DATA(11) D11 DNC26
103 43
EBI2_DATA(7) D7 DNC27
104 42
EBI2_DATA(5) D5 DNC28
105 41
EBI2_DATA(3)
D3 DNC29
106 40
EBI2_DATA(6)
D6 DNC30
107 39
EBI2_DATA(4)
D4 DNC31
108 38
EBI2_WE_N WE_N DNC32
109 37
EBI2_DATA(0) D0 DNC33
110 36
EBI2_DATA(2) D2 DNC34
111 35
VDD_E2 DNC35
112 34
EBI2_DATA(1) D1 DNC36
113 33
VDD_C7 VDD_P2
114 32
RESERVED1 DNC37
115 31
RESERVED2 VDD_C2
116 30
RESERVED3 DNC38
117
GND_SLUG
29
DNC39
FLO_INT0
FLO_INT1
FLO_SSBI
RESOUT_EBI2_N
RF_ON
MBD_RX_IP
MBD_RX_IM
MBD_RX_QP
MBD_RX_QM
4 5 6 7
8 9 10 11
R907
0 C900 C901 C902
0.1u 100p 10p R900
12K
1 24
SW_CTL2 TCXO_ON FLO_INT1
R901 2 23
LNA2_IN RF_ON
5.6K 3 22
BIAS_R1 SSBI
4 21
VDDA1 U900 VDDM2
5 20
L900 GND RBR1000 VDDM1
R905 6 19
0 22nH VDDA2 TCXO RBR1000_TCXO
7 18
LNA1_IN VDDA7
8 17
SW_CTL1 CP_OUT
C909
2.7n
C934
NA
C910
270p
R903
10K
C911
10p
R908
VREG_MFLO_2.6V
C914
0 C913 C915
0.1u 100p
10p C912
100p
C916
4.7u
VREG_MFLO_2.6V
R904
0
VREG_MSMP_2.8V
C917 C918 C919 C920
0.1u 0.1u 0.1u 0.1u
VREG_MSMC_1.25V
C921 C922 C923 C924
0.1u 0.1u 0.1u 0.1u
TCXO_MSM
SLEEP_CLK
VREG_MSMA_2.6V
C925 C926 C927
0.1u 0.1u 0.1u
8 9
- 179 -
12 13 14 15
RF_ON
FLO_SSBI
VREG_MSMP_2.8V
R902
10
C906
100p
only CU920
LGE Internal Use Only
16
A
B
C
D
E
F
C
D
E