Cpu Status Indicators - IBM System/370 145 Operating Procedures Manual

CPU STATUS INDICATORS
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Service Use
I ndicators not described in the chart are for
service personnel and are described in mainte-
nance documentation.
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CPU STATUS
ADR SNG ADR TOO CF
EXE CaMP CLOCK STaR TRAP TRAP ECC EC CS X.LATE CLOCK LOG SNG PWR IMPL
000066660000000008
n
CYCLE
n
INDICATOR CONDITION INDICATED
CPU stopped state reached as a resu It of:
1. Pressing the STOP key.
EXE CPLT
2. The RATE switch being in the INSTRUCTION STEP position.
3.
A match being detected while in the address match mode of
operation.
The address (real or logical) being used to access main storage
matches the address set into switches CDE FGH during an ad-
ADR COMP MATCH
dress match operation. The action taken by the CPU as a
result of the match condition is controlled by the setting of
the ADDRESS COMPARE CONTROL switch.
CLOCK STOP CPU is in a hard-stop condition (CPU clock not running).
TOO CLOCK INVLD
Time-of-day clock is invalid. The indicator is turned off
by successfully executing a set clock instruction.
A log is present in the log area of main storage. When the
LOG PRES CHECK CONTROL switch is in the STOP AFTER LOG
position and the LOG PRES indicator is on, SEREP may be run.
SNG ECC
One of the data or check bits from storage has been corrected.
CF PWR ON Power is applied to the console file.
IMPL REaD An IMPL operation is required. (See page 44)
System Control Panel Indicators, Switches, and Keys 9
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