CMOSTEK CMT2380F32 Manual

CMOSTEK CMT2380F32 Manual

Ultra low power sub-1ghz wireless mcu
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Ultra Low Power Sub-1GHz Wireless MCU
MCU Features
32 MHz Cortex-M0+ 32-bit CPU platform
32 kB Flash with erasing protection
4 kB RAM with parity to enhance system stability
16 general purpose I/O interfaces available
Flexible power management system
-
0.5 uA @ 3 V(deep sleep mode): the power
consumption when all clocks are off, power-on
reset is active, I/O state is maintained, I/O
interrupt is active and all registers, RAM, and
CPU stay in data storage status
-
0.8 uA @ 3 V (deep sleep mode): the power
consumption when RTCs work
-
150 uA/MHz @3 V @16 MHz: the power
consumption when CPU and peripheral modules
run with program Flash operating internally
-
2 us: the chip's wakeup time from ultra-low power
mode, the fast response enables mode switching
more flexible and efficient
RTC and crystal
-
External high speed crystal: 4 – 32 MHz
-
External low speed crystal: 32.768 kHz
-
Internal high speed clock: 4/8/16/22 and 24 MHz
-
Internal low speed clock: 32.8/38.4 kHz
Timer and counter
-
3 general purpose 16-bit timers/counters
-
A 16-bit timer/counter available in low power
mode
-
3 high performance 16-bit timers/counters
capable for capture/compare and PWM output
-
One 20-bit programmable counter/watchdog
circuit with built-in dedicated ultra-low power
RC-OSC to perform WDT counting
Communication interface
-
UART 0 and UART 1 standard communication
interface
-
One ultra-low power UART(LPUART) supporting
for low speed clock
-
Standard I2C and SPI communication interface
CMT2380F32
SoC
One 12-bit 1 Msps SAR ADC
2 voltage comparators
Low voltage detector (LVD), configurable 16-level
comparison level, support for port voltage and supply
voltage monitoring
RF Features
Frequency range: 127 – 1020 MHz
Modem: FSK, GFSK, MSK, GMSK and OOK
Data rate:0.5 – 300 kbps
Sensitivity: -121 dBm @ 434 MHz, FSK
Receiving current: 8.5 mA @ 434 MHz, FSK
Transmitting current: 72 mA @ 20 dBm, 434 MHz
Configurable up to 64-byte FIFO
System Features
Supply voltage:1.8 – 3.6 V
Operating temperature: -40 – 85 ℃
QFN40 5x5 packaging
Application
Smart grid and automatic meter reading
Home security and building automation
Wireless sensor networks and industrial monitoring
ISM band data communication
Description
Employed a 32-bit Cortex-M0+ CPU core and an ultra-low
power RF transceiver, the CMT2380F32 is a FSK, GFSK,
MSK, GMSK and OOK wireless MCU with high performance
and ultra-low power applying to 127 to 1020 MHz band
wireless applications. Operating with 1.8 to 3.6 V supply
voltage, the CMT2380F32 consumes only 72 mA current
while delivering up to 20 dBm power. As for the receiver, the
Rev0.9 | 1/65
CMT2380F32
www.cmostek.com

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Summary of Contents for CMOSTEK CMT2380F32

  • Page 1 RC-OSC to perform WDT counting Employed a 32-bit Cortex-M0+ CPU core and an ultra-low  Communication interface power RF transceiver, the CMT2380F32 is a FSK, GFSK, UART 0 and UART 1 standard communication MSK, GMSK and OOK wireless MCU with high performance interface...
  • Page 2 RSSI, manual fast frequency hopping, multi-channel input 12-bit high-speed ADC, etc. Leading the industry in the aspect of the smallest package size, the CMT2380F32 is ideal for size constraints due to a small form-factor, power-efficient IoT applications. Rev0.9 | 2/65...
  • Page 3 √ √ √ 32 k 16+1 x9-ch x6-ch Figure 1. Typical Application Schematic for the CMT2380F32 (20dBm Output Power with Antenna Switch) Table 2. Typical Application BOM (20 dBm Output Power with Antenna Switch) Component Value Label Description Unit Supplier...
  • Page 4 ± 10%, 0603 multilayer chip inductor Sunlord SDCL ± 10%, 0603 multilayer chip inductor Sunlord SDCL ± 10 ppm, SMD32*25 mm EPSON CMT2380F32, ultra-low power sub-1GHz CMOSTEK wireless MCU AS179, PHEMT GaAs IC SPDT Switch SKYWORKS kΩ ± 5%, 0402 kΩ...
  • Page 5: Table Of Contents

    CMT2380F32 Table of Contents 1 Electrical Specifications ........................7 Recommended Operating Conditions ........................ 7 Absolute Maximum Ratings ..........................7 RF Power Consumption ............................. 8 Receiver ................................9 Transmitter ............................... 11 RF Operating Mode Switching Time ......................... 12 RF Frequency Synthesizer ..........................12 Requirement on Crystals for RF Section ......................
  • Page 6 CMT2380F32 4.10 Fast Manual Frequency Hopping ........................43 4.11 Transceiver Control Interface and Operating Mode..................43 4.11.1 Transceiver SPI Interface Timing ......................43 4.11.2 Transceiver FIFO Interface Timing ......................44 4.11.3 Transceiver Operating Status, Timing, and Power Consumption ............. 45 4.11.4 Transceiver GPIO Function and Interrupt Mapping ..................
  • Page 7: Electrical Specifications

    [2]. The CMT2380F32 is a high performance RF integrated circuit. The operation and assembly of this chip should only be performed on a workbench with good ESD protection.
  • Page 8: Rf Power Consumption

    CMT2380F32 1.3 RF Power Consumption Table 5. RF Power Consumption Parameter Symbol Condition Min. Typ. Max. Unit Sleep mode, sleep counter off Sleep current SLEEP Sleep mode ,sleep counter on Standby current Crystal oscillator on 1.45 Standby 433 MHz RFS current...
  • Page 9: Receiver

    CMT2380F32 1.4 Receiver Table 6. Receiver Specifications Parameter Symbol Condition Min. Typ. Max. Unit kbps Data Rate FSK and GFSK kbps Error FSK and GFSK DR = 2.0 kbps, F = 10 kHz -121 DR = 10 kbps, F = 10 kHz...
  • Page 10 CMT2380F32 Parameter Symbol Condition Min. Typ. Max. Unit DR = 10 kbps, F = 10 kHz, BW = 100 Adjacent channel ACR-I kHz, 200 kHz channel spacing, rejection interference with the same modulation DR = 10 kbps, F = 10 kHz,...
  • Page 11: Transmitter

    F = 915 MHz harmonic,+13 dBm P - 52 Notes: [1]. The harmonic level mainly depends on the matching network. Above parameters are measured based on the CMT2380F32-EM, users may get different results on their applications. Rev0.9 | 11/65 www.cmostek.com...
  • Page 12: Rf Operating Mode Switching Time

    CMT2380F32 1.6 RF Operating Mode Switching Time Table 8. RF Operating Mode Switching Time Parameter Symbol Condition Min. Typ. Max. Units From sleep to RX SLP-RX From sleep to TX SLP-TX From standby to RX STB-RX From standby to TX...
  • Page 13: Requirement On Crystals For Rf Section

    CMT2380F32 1.8 Requirement on Crystals for RF Section Table 10. Requirement on Crystals for RF Section Parameter Symbol Condition Min. Typ. Max. Unit Crystal frequency XTAL Crystal frequency tolerance Load capacitance LOAD Ω Crystal startup time XTAL Notes: [1]. An external 26 MHz reference clock can be used to drive the XI pin directly through a coupling capacitor if such a clock is available.
  • Page 14: Controller Input Features(P0, P1, P2 And P3 Reset)

    CMT2380F32 Voltage (V) VOL @ VDD = 3.3 V VOH @ VDD = 3.3 V Voltage (V) Low drive Low drive High drive High drive Current (mA) Current (mA) Figure 2. Controller I/O Driving Ability 1.10 Controller Input Features(P0, P1, P2 and P3 Reset) Table 12.
  • Page 15: Port Leakage Features (P0, P1, P2 And P3)

    CMT2380F32 1.12 Port Leakage Features (P0, P1, P2 and P3) Table 14. Port Leakage Features (P0, P1, P2, and P3) Parameter Symbol Condition Min. Typ. Max. Unit Leakage current : 1.8 to 3.6V ± 50 lkg(Px,y) Notes: [1]. Unless otherwise specified, the leakage current is measured with GND or VDD applied to the corresponding pin.
  • Page 16 CMT2380F32 Parameter Symbol Condition Note Typ. Max. Unit All peripheral clock sources are on 8 MHz with RCH as clock source. 16 MHz 24 MHz 1400 1420 4 MHz 8 MHz = 1.55 V, V = 1.8 ~ 3.6 V.
  • Page 17 CMT2380F32 Parameter Symbol Condition Note Typ. Max. Unit TA = - 40 ~ 25 ℃ = 1.55 V, V = 1.8~3.6V. All CORE TA = 50 ℃ peripheral clock sources are off, except RTC. TA = 85 ℃ TA = - 40 ~ 25 ℃...
  • Page 18: Por/Bor Features

    CMT2380F32 1.14 POR/BOR Features 1.65V VBOR_hys+ 1.50v VBOR_hys- Vth ~0.8v BOR_5V unknown unknown reset reset Figure 3. POR/BOR Features Notes: POR/BOR detects the VDD voltage. It detects the threshold only instead of VDD power-up and power-down slew rate. The detection threshold is the same no matter the VDD is powering on or off. A reset pulse is triggered when VDD is lower than the threshold.
  • Page 19: Controller External 32.768 Khz Oscillator

    CMT2380F32 1.16 Controller External 32.768 kHz Oscillator Table 18. Controller External 32.768 kHz Oscillator Parameter Symbol Condition Min. Typ. Max. Unit Crystal frequency 32.768 SCLK Equivalent series kΩ SCLK resistance The two pins of the crystal oscillator Load capacitance SCLK are connected separately.
  • Page 20: Controller Internal Rcl Oscillator

    CMT2380F32 1.18 Controller Internal RCL Oscillator Table 20. Controller Internal RCL Oscillator Parameter Symbol Condition Min. Typ. Max. Unit 38.4 Internal high speed ACLK oscillating frequency 32.768 Startup time ACLK Current consumption 0.25 ACLK Clock duty cycle ACLK = 1.8 ~ 3.6V, -2.0...
  • Page 21: Controller Adc Features

    CMT2380F32 1.21 Controller ADC Features ADC_CR0[1:0] ADC_CR0[10] AIN0 ADC_CR0[12:11] AIN8 Sample VCC/3 ADC_Result SARADC 采样保持 &Hold 1.2V Reference Voltage 1.2V基准电压 温度传感器 Temperature Sensor ADC_Result0 1.5V ADC_CR0[7:4] ADCREF 2.5V ADC_CR2[7:0] ExRef ADC_Result8 ADC_CR0[3:2] ADC_CR0[9:8] PCLK ADC_ResultAcc ADCCLK PCLK/2 PCLK/4 PCLK/8 Figure 4. Controller ADC Features Table 23.
  • Page 22 CMT2380F32 Parameter Symbol Condition Min. Typ. Max. Unit ≥ 1.8 V 200 ksps @ V REF = V 200ksps @ VDD ≥ 1.8 V REF = Internal 1.5V ≥ 2.8 V 200ksps @ V REF = Internal 2.5 V ≥ 2.7 V 1 Msps @ V ≥...
  • Page 23: Analog Voltage Comparator

    CMT2380F32 1.22 Analog Voltage Comparator VC0_CR[14:12] VC0_CR[3:1] VC0_CR[0] Trigger Policy Selection 触发条件选择 VCIN7 VC0中断 VCO Interrupt VC_CR[11:8] VCIN0 VCIN0 Vcore电压 Vcore Voltage VC0_CR[15] 温度传感器 Temperature Sensor VCIN7 Digital Filtering 数字滤波 ADC参考电压 ADC Reference Voltage 1.2V基准电压 1.2V Reference Voltage VCIN0 VC0_CR[11:8]...
  • Page 24 CMT2380F32 Parameter Symbol Condition Min. Typ. Max. Unit From main band gap being enabled to V1P2_AT being Warmup1 stable From 2.5V being enabled & BGR being enabled to V2P5 Warmup2 being stable V2P5 reference source V2P5 current VC_debounce = 000...
  • Page 25: Low Battery Detection Features

    CMT2380F32 1.23 Low Battery Detection Features LVD_CR[3:2] LVD_CR[0] LVD_CR[11:8] LVD_CR[15] Digital 数字滤波 Filtering LVD中断 LVD Interrupt Trigger Policy Selection LVD阈值 触发条件选择 threshold LVD复位 LVD Interrupt LVD_CR[7:4] LVD_CR[14:12] LVD_CR[1] Figure 6. Low Battery Detection Features Rev0.9 | 25/65 www.cmostek.com...
  • Page 26 CMT2380F32 Table 25. Low Battery Detection Features Parameter Symbol Condition Min. Typ. Max. Unit External input voltage range Single-ended LVD_CR_VTDS = 0000 1.86 LVD_CR_VTDS = 0001 1.96 LVD_CR_VTDS = 0010 2.07 LVD_CR_VTDS = 0011 2.17 LVD_CR_VTDS = 0100 2.27 LVD_CR_VTDS = 0101 2.38...
  • Page 27: Receive Current And Supply Voltage Correlation

    CMT2380F32 1.24 Receive Current and Supply Voltage Correlation 434MHz Rx Current vs. Supply Voltage 868MHz 8.80 8.60 8.40 8.20 8.00 7.80 7.60 7.40 Supply Voltage(V) Test Conditions:Freq = 434 MHz & 868 MHz, F = 10 kHz, BR = 10 kbps Figure 7.
  • Page 28: Receive Sensitivity And Supply Voltage Correlation

    CMT2380F32 3.3V Rx Current vs. Volt-Temp 1.8V 3.6V Temperature(℃) Test Conditions: Freq = 868 MHz, F = 10 kHz, BR = 10 kbps Figure 9. Rx Current vs. Volt-Temp 1.26 Receive Sensitivity and Supply Voltage Correlation 434MHz Sensitivity vs. Voltage 868MHz -113.0...
  • Page 29: Receive Sensitivity And Temperature Correlation

    CMT2380F32 1.27 Receive Sensitivity and Temperature Correlation 434MHz Sensitivity vs. Temperature 868MHz -112.0 -113.0 -114.0 -115.0 -116.0 -117.0 -118.0 Temperature(℃) Test Conditions:FSK modulation, F = 10 kHz, BR = 10 kbps Figure 11. Sensitivity vs. Temperature 1.28 Transmit Power and Supply Voltage Correlation...
  • Page 30: Phase Noise

    CMT2380F32 13dBm Tx Power vs. Supply Voltage 20dBm 20.0 19.0 18.0 17.0 16.0 15.0 14.0 13.0 12.0 11.0 10.0 Supply Voltage(V Test Conditions: :Freq = 868MHz, 20dBm&13dBmmatching network respectively Figure 13. Tx Power vs. Supply Voltage 1.29 Phase Noise 433.92 MHz Phase Noise 13.4dBm...
  • Page 31: Pin Description

    CMT2380F32 868 MHz Phase Noise 12.4dBm -100 866.5 867.5 868.5 869.5 center 868MHz sweep 5s (2000pts ) Res BW 1kHz Figure 15. 868 MHz Phase Noise Pin Description Figure 16. The CMT2380F32 Pin Arrangement Diagram Rev0.9 | 31/65 www.cmostek.com...
  • Page 32 CMT2380F32 Table 26. The CMT2380F32 Pin Description Pin # Pin Name Description Chip substrate, must connect to ground No connection 2 - 3 RFIP/RFIN Differential RF signal input port PA output RF-AVDD RF circuit VDD, requires to connect to a 1.8-3.6 V power supply...
  • Page 33 CMT2380F32 Pin # Pin Name Description General purpose digital input/output pin UART1_TXD UART1 TXD TIM6_CHB Timer6 capture input / compare output B UART0_TXD UART0 TXD TIM0_GATE Timer0 gating TIM4_CHB Timer4 capture input / compare output B SPI_MISO SPI Module master input slave output data signal...
  • Page 34 CMT2380F32 Pin # Pin Name Description MCU-GND Digital Ground MCU-VCAP LDO core power supply output (internal circuit only, connect 4.7uF capacitor) MCU-VDD Digital Power Supply General purpose digital input/output pin PCA_CH3 PCA capture input / compare output 3 SPI_CS SPI CS...
  • Page 35 CMT2380F32 Pin # Pin Name Description TIM5_CHB Timer5 capture input / compare output B HCLK_OUT HCLK output PCA_CH1 PCA capture input / compare output 1 SPI_MOSI SPI module master output slave input data signal UART1_RXD UART1 RXD VC1_OUT VC1 output...
  • Page 36 CMT2380F32 Pin # Pin Name Description RCL_OUT RCL oscillating output HCLK_OUT HCLK output SWCLK Debugging interface, SWCLK SCLK RF SPI clock RF SPI data input/output, connect to 10 kΩ pull-up resistor externally RF SPI chip selection for register access FCSB...
  • Page 37: Chip Structure

    Powered by built-in 12-bit high-precision and high-speed SAR ADC (sampling rate up to 1Msps), comparator, rich peripherals like multi-channel UART, SPI andI2C, the CMT2380F32 is remarkable for such features as high integration, strong anti-interference and high reliability. See below table for its rich peripherals.
  • Page 38 CMT2380F32 Table 27. The CMT2380F32 Peripheral Resource List Name Peripheral Resource 32 kbytes Flash 4 kbytes Debug function Serial bus debug interface Unique identification code Support UART0/1 LPUART Multi-function serial interface 12-bit1 Msps SAR VC0/1 Analog voltage comparator Real time clock...
  • Page 39: Sub-Ghz Transceiver

    This effect becomes a VCO pull that produces spectral spurs and glitches near the target carrier. By ramping the PA output power, it can minimize the instantaneous glitch of the PA. The CMT2380F32 has a built-in ramping mechanism. When the PA ramp is enabled, the PA output power can be ramped to the required value by the configured speed in order to reduce the undesired spectral spectrum.
  • Page 40: Transceiver Crystal Oscillator

    CMT2380F32 same below) drops 0.9V± 20% (0.72V – 1.08V) within less than 2 us. Note that it monitors RF-VDD decrease instead of its absolute value as shown inthe below figure. < 0.2 us RF-VDD 0.9 V x (1 +/- 20%) Figure 18.
  • Page 41: Transceiver Built-In Low Frequency Oscillator (Lposc)

    4.5 Transceiver Built-in Low Frequency Oscillator (LPOSC) The CMT2380F32 RF system integrates a sleep timer driven by a 32 kHz low power oscillator (LPOSC). When this function is enabled, the timer periodically wakes up the chip from sleep mode. Sleep time can be configured from 0.03125 ms to 41,922,560 ms when the chip is in periodical operating mode.
  • Page 42: Phase Jump Detector (Pjd)

    GPIO for users to sample data. Error existing between the recovered clock frequency and the actual transmitted data rate will cause data acquisition errors, error codes and decoding errors during data reception. Therefore, CDR takes a simple but critical role. The CMT2380F32 receiver supports three CDR systems according to different application requirements:  COUNTING system This system is designed for the case where the data rate is relatively accurate.
  • Page 43: Fast Manual Frequency Hopping

    4.11.1 Transceiver SPI Interface Timing The RF system of CMT2380F32 communicates with the controller section via a 4-wire SPI port (FCSB, CSB, SDA and SCLK). The low active CSB is the chip selection signal used to access the registers. The low active FCSB is the chip selection signal used to access the FIFO.
  • Page 44: Transceiver Fifo Interface Timing

    CMT2380F32 > 0.5 SCLK cycle > 0.5 SCLK cycle FCSB SCLK r/w = 0 register address register write data Figure 23. Transceiver SPI Write Register Timing 4.11.2 Transceiver FIFO Interface Timing By default, the transceiver provides two independent 32-byte FIFOs for RX and TX. The RX FIFO is used to store received data in RX mode, and the TX FIFO is to store data to be transmitted in TX mode.
  • Page 45: Transceiver Operating Status, Timing, And Power Consumption

    CMT2380F32 > 1 SCLK cycle > 2 us > 4 us > 1 SCLK cycle > 2 us FCSB SCLK FIFO write data FIFO write data Figure 25. SPI Write FIFO Timing The transceiver provides enriched FIFO-related interrupt sources helping for efficient operation of the chip. The Rx and Tx-related FIFO interrupt timing is shown in the figure below.
  • Page 46 CMT2380F32 period of time for crystal stabilization then to start working. The default stabilization time is set as 2.48ms by default. The time can be written later by writing XTAL_STB_TIME <2:0>. The chip stays in the IDLE state until the crystal is stable. After the crystal is stabilized, the chip will leave IDLE and begin calibration for each module.
  • Page 47 CMT2380F32 IDLE 0000 Power up go_sleep go_sleep SLEEP go_rx go_tx 0001 go_stby go_sleep go_tx go_rx STBY 0010 go_stby go_stby go_tfs go_rfs 0100 0011 go_sleep go_sleep go_rfs go_rx go_tfs go_tx go_switch 0110 0101 go_switch Figure 29. Status Switch Diagram  SLEEP Status The power consumption of the chip keeps the lowest in SLEEP mode with almost all modules disabled.
  • Page 48: Transceiver Gpio Function And Interrupt Mapping

    CMT2380F32 RX. Switching from STBY to TFS requires approximately 350us for PLL calibration and settling. Switching from SLEEP to TFS requires more time to wait for the crystal startup and stabilizing for a while. Switching from other states to TFS is done immediately.
  • Page 49 CMT2380F32 Clear Name INT1_SEL Description Method TX_DONE 01010 An interrupt indicating TX completion by MCU RX_FIFO_NMTY 01011 An interrupt indicating RX counter is not empty Auto RX_FIFO_TH 01100 An interrupt indicating unread contents in RX FIFO exceed FIFO TH Auto...
  • Page 50: Controller Function Introduction

    CMT2380F32 RX_ACTIVE RSSI_VLD_FLG PREAM_OK_CLR PREAM_OK_EN Preamble OK Interrupt Source PREAM_OK_FLG SYNC_OK_CLR SYNC_OK_EN INT1_CTL <4:0> Sycn Word OK Interrupt Source SYNC_OK_FLG 00000 NODE_OK_CLR NODE_OK_EN 00001 Node ID OK 00010 Interrupt Source NODE_OK_FLG 00011 00100 CRC_OK_CLR CRC_OK_EN 00101 CRC OK Interrupt Source...
  • Page 51 CMT2380F32 processor fully supports the integrated Keil & IAR debugger. The Cortex-M0+ includes a hardware debug circuit that supports the 2-pin SWD debug interface. Table 31. ARM Cortex-M0+ Features CPU instruction set Thumb/Thumb-2 Assembly line 2-stage pipeline Performance efficiency 2.46CoreMark/ MHz Performance efficiency 0.95 DMIPS/MHz in Dhrystone...
  • Page 52 CMT2380F32 POWER VOLT.REG VDD=1.8 to 5.5v Flash VDD to Vcore 16/32 KB CORTEX-M0 CPU @VDD Fmax=32MHz VDDA SRAM VSSA 2/4KB POR/BOR NVIC RESET SWDI0 SWCLK @VDDA XTLO XTLI System control P00,P01 XTHO GPIO port0 P02,P03 XTHI @VDD GPIO port1 RTC_1Hz...
  • Page 53: Memory

    CMT2380F32 5.2 Memory 5.2.1 On-chip Program Memory Flash It's powered by fully built-in 32kbytesflash controller remarkable for no external high voltage input required, programming with high voltage generated by fully built-in circuits and support of ISP, IAP, ICP functions. 5.2.2 On-chip Data Memory Flash 4 kbytes RAM data is retained in various ultra-low power modes desired by customer.
  • Page 54 CMT2380F32 0xFFFF_FFFF Reserved 0xE010_0000 Cortex-M0+ Specific 0xE000_0000 Peripheral resource area PORT CTRL 0x4002_0c00 Reserved 0x4002_1000 0x4002_0900 Reserved 0x4002_0800 0x4002_0000 RAM CTRL 0x4002_0400 flash CTRL 0x4002_0000 Reserved 0x4000_3C00 TIM6 0x4000_3800 Reserved Reserved TIM5 0x4000_3400 TIM4 0x4000_3000 Reserved 0x4000_2C00 Reserved Reserved 0x4000_2800...
  • Page 55: System Clock

    CMT2380F32 5.3 System Clock  1 high-precision internal clock RCH with a configurable frequency of 4~24MHz. The wake-up time from low-power mode to operating mode is 3 us at 16MHz configuration. Frequency tolerance over full temperature and voltage range is less than ± 2.5%. No external expensive high-frequency crystal is required.
  • Page 56 CMT2380F32 Table 32. Interrupt Vector Address Table Interrupt Vector Number Interrupt Source GPIO_P0 GPIO_P1 GPIO_P2 GPIO_P3 UART0 UART1 UART2 Timer 0 Timer 1 Timer 2 LPTimer Timer 4 Timer 5 Timer 6 RAM Flash fault Clock trim Rev0.9 | 56/65...
  • Page 57: Reset Controller

    CMT2380F32 5.8 Reset Controller This product has 7 reset signal sources. Each reset signal allows CPU resume to run, with most of the registers being reset and the program counter PC being reset and pointing to 00000000. Table 33. Reset Source Table...
  • Page 58: Watchdog Wdt

    CMT2380F32 The LPTimer is an asynchronous 16-bit timer/counter that can still perform clock/count by internal low speed RC or external low speed crystal oscillator even the system clock is turned off. It provides the function to wake up the system in low power mode by interrupt as well.
  • Page 59: Synchronous Serial Interface Spi

    CMT2380F32 5.12 Synchronous Serial Interface SPI One serial peripheral interface, supporting master-slave mode. 5.13 I2C Bus One I2C (inter-integrated circuit), supporting master-slave mode. With serial synchronous clock, data can be transmitted between devices at different rates. The serial 8-bit bidirectional data transmission can reach a maximum speed of 1Mbps.
  • Page 60: Embedded Debug System

    Keil and IAR. It supports for 4 hard breakpoints and multiple soft breakpoints. 5.22 High Security It's powered with encrypted embedded debugging solution providing full-featured real-time debugger. Please refer to AN220 CMT2380F32 User's Manual (Microcontroller Section) for detailed instructions on using the CMT2380F32 microcontroller. Rev0.9 | 60/65...
  • Page 61: Order Information

    R refers to tape and tray type, and the minimum order quantity (MOQ) is 3,000 pieces. Please visit www.cmostek.com for more product/product line information. Please contact sales@cmostek.comor your local sales representative for sales or pricing requirements. Rev0.9 | 61/65 www.cmostek.com...
  • Page 62: Packaging Information

    CMT2380F32 Packaging Information The packaging information of the CMT2380F32 is shown in the below figure. EXPOSED THERMAL Top View Bottom View PAD ZONE Side View Figure 33. QFN405x5 Packaging Table 37. QFN405x5 Packaging Scale Scale (mm) Symbol Maximum Min. Typ.
  • Page 63: Top Marking

    Top Marking 2 3 8 0 F 3 2 E 9 ① ② Figure 34. The CMT2380F32 Top Marking Table 38. The CMT2380F32 Top Marking Information Marking Method Laser Pin 1 Mark Diameter of the circle = 0.3 mm Font Size 0.5 mm, align right...
  • Page 64: Reference Documents

    AN141 CMT2300A Quick Start Guide CMT2380F32 RF quick start AN142 CMT2300A FIFO and Packet Format Usage Guide CMT2380F32 RF transceiver message usage guide AN143 CMT2300A RSSI User Guide CMT2380F32 RF RSSI user guide AN144 CMT2300A Low Power Mode User Guide...
  • Page 65: Contacts

    The material contained herein is the exclusive property of CMOSTEK and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of CMOSTEK. CMOSTEK products are not authorized for use as critical components in life support devices or systems without express written approval of CMOSTEK.

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