Cpu 6/7 (Gnd - Clevo B7130 Service Manual

Schematic Diagrams
CPU 7/7 (RESERVED)
PCI-Express Conf iguration Select
CFG0
C F G0
Sheet 9 of 53 CFG3 - PCI-Expre ss Static Lane Rev ersal
CPU 7/7
CFG3
(RESERVED)
C F G3
CFG4 - Display P ort Presence
CFG4
C F G4
C F G7
CFG7
Clarksfield (only for early samples
pre-ES1) - Connect to GND with 3.01K Ohm/5%
resistor
B - 10 CPU 7/7 (RESERVED)
PROCESSOR 7/7
1 0 MV R E F _D Q _D IM 0
1 : Single P EG
0 : Bifurcat ion enable
4 D R A M RS T _ C N T R L
R1 0 6 * 3 .01 k _ 0 4
11 M V R E F _ D Q_ D IM1
1 : Normal O peration
0 : Lane Num bers Reversed
15 -> 0, 14 -> 1, ...
4 D R A M RS T _ C N T R L
R6 1 * 3 .01 k _ 0 4
1 : Disablled; No physical Display Port
attached to Embedded Display Port
0 : Enabled; An external Display Port
device is connected to the Embedded
isplay Port
R1 0 2 * 3 .01 k _ 0 4
R6 2 * 3 .01 k _ 0 4
( RESERVED )
U4 0 E
R 2 38 0 _ 0 4
A P 2 5
A L2 5 R S V D 1
R S V D 2
D S V RE F _ CH _ A _ DIM M A L2 4
R S V D 3
A L2 2
A J3 3 R S V D 4
Q 30
R S V D 5
A G9
*A O3 4 0 2 L R 2 3 3
R S V D 6
M2 7
L2 8 R S V D 7
* 1 0 0K _0 4
R S V D 8
J1 7
R S V D 9
H1 7
R S V D 1 0
G2 5
R S V D 1 1
G1 7
R2 4 9 0 _ 0 4
R S V D 1 2
E 3 1
R S V D 1 3
E 3 0
R S V D 1 4
D S V RE F _ CH _ B _ DIM M V RE F _ CH _ B _ DIM M
Q 31
*A O3 4 0 2 L R 2 4 2
* 1 0 0K _0 4
C F G 0 A M3 0
C F G [0 ]
A M2 8
A P 3 1 C F G [1 ]
C F G [2 ]
A L3 2
C F G 3
C F G [3 ]
C F G 4 A L3 0
C F G [4 ]
A M3 1
C F G [5 ]
A N2 9
C F G [6 ]
C F G 7 A M3 2
C F G [7 ]
A K 3 2
A K 3 1 C F G [8 ]
C F G [9 ]
A K 2 8
C F G [1 0 ]
A J2 8
A N3 0 C F G [1 1 ]
C F G [1 2 ]
A N3 2
C F G [1 3 ]
A J3 2
A J2 9 C F G [1 4 ]
C F G [1 5 ]
A J3 0
C F G [1 6 ]
A K 3 0
H1 6 C F G [1 7 ]
R 43 2 *0 _ 0 4 R S V D8 6
R S V D _ T P _ 8 6
RSVD 86
Conn ect to GND
B 1 9
R S V D 1 5
A 1 9
R S V D 1 6
H _ R S V D 1 7_ R A 2 0
R 43 0 * 10 m i l _ sh o rt
R S V D 1 7
R 43 1 * 10 m i l _ sh o rt H _ R S V D 1 8_ R B 2 0
R S V D 1 8
U 9
R S V D 1 9
T 9
R S V D 2 0
A C 9
R S V D 2 1
A B 9
R S V D 2 2
C 1
R S V D _ N CT F _ 2 3
A 3
R S V D _ N CT F _ 2 4
J2 9
R S V D 2 6
J2 8
R S V D 2 7
A 3 4
A 3 3 R S V D _ N CT F _ 2 8
R S V D _ N CT F _ 2 9
C3 5
B 3 5 R S V D _ N CT F _ 3 0
R S V D _ N CT F _ 3 1
P Z 9 8 9 2 7-3 6 4 1 -0 1 F
A J 1 3
R S V D 3 2 A J 1 2
R S V D 3 3
A H 2 5
R S V D 3 4
A K 2 6
R S V D 3 5
A L 2 6
R S V D 3 6
A R 2
R S V D _ NC T F _ 3 7
A J 2 6
R S V D 3 8
A J 2 7
R S V D 3 9
A P 1
R S V D _ NC T F _ 4 0
A T 2
R S V D _ NC T F _ 4 1
A T 3
R S V D _ NC T F _ 4 2
A R 1
R S V D _ NC T F _ 4 3
A L 2 8
R S V D 4 5
A L 2 9
R S V D 4 6
A P 3 0
R S V D 4 7 A P 3 2
R S V D 4 8
A L 2 7
R S V D 4 9
A T 3 1
R S V D 5 0
A T 3 2
R S V D 5 1
A P 3 3
R S V D 5 2
A R 3 3
R S V D 5 3
A T 3 3
R S V D _ NC T F _ 5 4 A T 3 4
R S V D _ NC T F _ 5 5
A P 3 5
R S V D _ NC T F _ 5 6
A R 3 5
R S V D _ NC T F _ 5 7 A R 3 2
R S V D 5 8
E 1 5
R S V D _ T P _ 5 9
F 1 5
R S V D _ T P _ 6 0
A 2
K E Y D 15
R S V D 6 2
C 15
R S V D 6 3
A J 1 5 RS V D6 4 _ R
R1 2 2 *1 0 m i l _ s h o rt
R S V D 6 4 A H 1 5
RS V D6 5 _ R R1 5 4 *1 0 m i l _ s h o rt
R S V D 6 5
A A 5
R S V D _ T P _ 6 6
A A 4
R S V D _ T P _ 6 7
R 8
R S V D _ T P _ 6 8 A D 3
R S V D _ T P _ 6 9
A D 2
R S V D _ T P _ 7 0
A A 2
R S V D _ T P _ 7 1 A A 1
R S V D _ T P _ 7 2
R 9
R S V D _ T P _ 7 3
A G 7
R S V D _ T P _ 7 4 A E 3
R S V D _ T P _ 7 5
V 4
R S V D _ T P _ 7 6
V 5
R S V D _ T P _ 7 7
N 2
R S V D _ T P _ 7 8
A D 5
R S V D _ T P _ 7 9
A D 7
R S V D _ T P _ 8 0
W 3
R S V D _ T P _ 8 1
W 2
R S V D _ T P _ 8 2 N 3
R S V D _ T P _ 8 3
A E 5
R S V D _ T P _ 8 4
A D 9
R S V D _ T P _ 8 5
A P 3 4 TP _R S V D 8 6 VSS (AP34) can be left NC is
V S S
CRB implementation ; EDS/DG
recommendation to GND