Cypress F2MC-8FX Series Application Note
Watchdog timer
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- Setup manual (41 pages) ,
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Summary of Contents for Cypress F2MC-8FX Series
- Page 1 The following document contains information on Cypress products. The document has the series name, product name, and ordering part numbering with the prefix “MB”. However, Cypress will offer these products to new and existing customers with the series name, product name, and ordering part number with the prefix “CY”.
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Page 2: Table Of Contents
Reset control circuit is used to generate the reset signal when the WDT counter overflows Watchdog timer clear selector is used to selects the watchdog timer clear signal Counter timer control circuit Hardware and software watchdog timer www.cypress.com Document No. 002-05336 Rev.*A... -
Page 3: Block Diagram
F²MC-8FX Family, MB95200H/210H Series Watchdog Timer Block Diagram Figure 1 shows the internal block diagram of watchdog timer. Figure 1. Block Diagram of Watchdog Timer www.cypress.com Document No. 002-05336 Rev.*A... -
Page 4: Registers
R0/WX : Undefined bit (Read value is “0”, writing has no effect on operation) R1/WX : Undefined bit (Read value is “1”, writing has no effect on operation) : Write only (Writable, “0” is read) R0/W www.cypress.com Document No. 002-05336 Rev.*A... -
Page 5: Nvr (Non-Volatile Register) Function
The HWWDT is selected and the SWWDT is disabled. [It can be stopped in one of A597 the standby modes (stop/sleep/timebase timer/watch mode).] The WHWDT is selected and the SWWDT is disabled. [It keeps running in one of the Other than the above values standby modes (stop/sleep/timebase timer/watch mode).] www.cypress.com Document No. 002-05336 Rev.*A... -
Page 6: Interval Time
(main clock = 4MHz). Figure 5. Clearing Timing and Interval Time of Watchdog Timer Please note that program must clear the counter of the watchdog timer within the minimum time. www.cypress.com Document No. 002-05336 Rev.*A... -
Page 7: Usage And Examples
For this reason, the watchdog timer cannot function as such, if the software is set to clear the selected timer repeatedly during the interval time of the watchdog timer www.cypress.com Document No. 002-05336 Rev.*A... -
Page 8: Software Watchdog Timer
HWD_DISABLE .SECTION WDT, CONST, LOCATE=H'FFBE .DATA.W 0xA596 #endif startup.asm Refer to Appendix Sample Code for project “SWWDT”. Please note that once the watchdog timer is activated, it cannot be stopped until a reset is generated. www.cypress.com Document No. 002-05336 Rev.*A... -
Page 9: Hardware Watchdog Timer
HWD_DISABLE .SECTION WDT, CONST, LOCATE=H'FFBE .DATA.W 0xA596 #endif main.c startup.asm Refer to Appendix Sample Code for project “HWWDT”. Please note that the hardware watchdog timer starts automatically after a reset and cannot stop its operation. www.cypress.com Document No. 002-05336 Rev.*A... -
Page 10: Note On Using Watchdog Timer
CPU returns from stop mode in sub-clock mode or sub-CR mode. Take account of the setting of the sub-clock stabilization wait time when selecting the sub-clock. Additional Information For more Information on MB95200 products, visit the following website: http://www.cypress.com/8fx-mb95200 www.cypress.com Document No. 002-05336 Rev.*A... -
Page 11: Sample Code
// set count clock is 2 // start WDT counter /*--------------------------------------------------------------------------- name: main(); function: main loop -----------------------------------------------------------------------------*/ void main(void) PDR0_P05 = 0; // initial value DDR0_P05 = 1; // set P05 as output InitWDT (); www.cypress.com Document No. 002-05336 Rev.*A... - Page 12 // clear WDT timer within a certain amount of time startup.asm ;-------------------------------------------------------------------------- ; variable define declaration ;-------------------------------------------------------------------------- #define HWD_DISABLE ; if define this, Hard Watchdog will disable. ;-------------------------------------------------------------------------- ; Hard Watchdog ;-------------------------------------------------------------------------- #ifdef HWD_DISABLE .SECTION WDT, CONST, LOCATE=H'FFBE .DATA.W 0xA596 #endif www.cypress.com Document No. 002-05336 Rev.*A...
- Page 13 // initial value DDR0_P05 = 1; // set P05 as output while(1) PDR0_P05 = ~PDR0_P05; // show program is normal run Delay (500); WDTC |= 0x05; // clear WDT timer within a certain amount of time www.cypress.com Document No. 002-05336 Rev.*A...
- Page 14 F²MC-8FX Family, MB95200H/210H Series Watchdog Timer startup.asm ;-------------------------------------------------------------------------- ; variable define declaration ;-------------------------------------------------------------------------- ;#define HWD_DISABLE ; if define this, Hard Watchdog will disable. ;-------------------------------------------------------------------------- ; Hard Watchdog ;-------------------------------------------------------------------------- #ifdef HWD_DISABLE .SECTION WDT, CONST, LOCATE=H'FFBE .DATA.W 0xA596 #endif www.cypress.com Document No. 002-05336 Rev.*A...
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Page 15: Document History
Description of Change Change Date HUAL 03/20/2008 Initial release 07/18/2008 Added URL in Chapter 6 Additional Information; modified figure number and some sample code. 5267132 HUAL 05/11/2016 Migrated Spansion Application Note MCU-AN-500013-E-11 to Cypress format www.cypress.com Document No. 002-05336 Rev.*A... - Page 16 Cypress is not liable, in whole or in part, and you shall and hereby do release Cypress from any claim, damage, or other liability arising from or related to all Unintended Uses of Cypress products.
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