Chapter 2
Register Map and Descriptions
Clear Register
Write to individual bit of this register to clear certain functionality in the board.
Address Offset: 0x01
Type:
Size:
Bit Map:
7
6
Reserved
ClrWDT+
Bit
7
6
5
4
3
2
1–0
Static DIO Register-Level Programmer Manual
Write strobe
8-bit
5
RstWDT
ClrWDTExp
Name
Reserved
ClearInterruptWDT
RstWDT
ClrWDTExp
ClrEdge
ClrOvrFlow
Reserved
4
3
ClrEdge
ClrOvrFlow
Description
Write only zeros to this bit.
Set this bit to 1 to clear an interrupt caused by the
expiration of the watchdog timer (WDT).
Set this bit to 1 periodically (less than the minimum
watchdog timer expiration interval) to indicate that
the application is running as expected.
Set this bit to 1 to clear the effect of a watchdog
timer expiration.
Set this bit to 1 to clear the Edge Status bit in the
Change Status Register and clear all edge detectors.
Clear Overflow—Set this bit to 1, along with the
Clear Edge Detectors bit, to clear the overflow status
bit in the Change Status Register.
Write only zeros to these bits.
2-14
2
1
Reserved
0
Reserved
ni.com