Xilinx MultiLINX Series Hardware User's Manual page 84

Hardware User Guide
Pin Name
J1–5 N.C.
a
J1–7 CCLK
a
J1–9 D/P
a
J1–11 DIN
J1–13 N.C.
3-22
Table 3-7 XChecker/Parallel Cable III Connector J1
Function
b
Provides clock
during configura-
tion or readback.
Connects to
XC3020A input pin
50.
Starts configuration
and indicates
completion.
Connects to
XC3020A DONE/
PROGRAM pin 45.
Provides configura-
tion data during
configuration.
Connects to
XC3020A DIN input
pin 58.
b
Pin Name
J1–6 TRIG
b
J1–8 N.C.
b
J1–10 N.C.
b
J1–12 N.C.
b
J1–14 N.C.
Xilinx Development System
Function
XChecker Cable input
that allows an external
event to trigger read-
back of the XC3020A
or outputting a burst
of clocks to the
XC3020A.
Connects to tiepoint
J3–1.