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Circuit Diagrams and PWB Layouts
SSB (.5 Version) PNX2015: DV I/O Interface
1
2
PNX 2015: DV I/O INTERFACE
B4B
A
DV INPUT
DV4-CLK
AK8
DV_CLK
AH8
DV4-VALID
DV_VALID
B
DV4-DATA0_SOP
AG8
DV4_DATA_0
DV4-DATA1_ERR
AK7
DV4_DATA_1
DV4-DATA2_0
AJ7
DV4_DATA_2
DV4-DATA3_1
AH7
DV4_DATA_3
AG7
DV4-DATA4_2
DV4_DATA_4
AF7
DV4-DATA5_3
DV4_DATA_5
AK6
DV4-DATA6_4
DV4_DATA_6
DV4-DATA7_5
AJ6
DV4_DATA_7
DV4-DATA8_6
AH6
DV4_DATA_8
DV4-DATA9_7
AG6
DV4_DATA_9
AF6
DV5-DATA0_SOP
DV5_DATA_0
AK5
DV5-DATA1_ERR
DV5_DATA_1
C
DV5-DATA2_0
AH5
DV5_DATA_2
DV5-DATA3_1
AG5
DV5_DATA_3
DV5-DATA4_2
AK4
DV5_DATA_4
DV5-DATA5_3
AJ4
DV5_DATA_5
DV5-DATA6_4
AH4
DV5_DATA_6
AK3
DV5-DATA7_5
DV5_DATA_7
AJ3
DV5-DATA8_6
DV5_DATA_8
DV5-DATA9_7
AK2
DV5_DATA_9
DV-VREF
AJ9
DV_VREF
DV-FREF
AK9
DV_FREF
DV-HREF
AH9
DV_HREF
D
E
3104 313 6095.5
1
2
EBJ1.0U
7.
3
4
7J00-4
PNX
2015
Φ
AD28
DV1_CLK
AD29
DV1_VALID
AB27
DV1_DATA0
AA30
DV1_DATA1
AA29
DV1_DATA2
AA28
DV1_DATA3
AB29
DV1_DATA4
AB28
DV1_DATA5
AC30
DV1_DATA6
AC28
DV1_DATA7
AC27
DV1_DATA8
AB30
DV1_DATA9
AF30
33R
3LR1
DV2_CLK
AF27
DV2_VALID
AE30
DV2_DATA0
AF28
DV2_DATA1
AD27
DV2_DATA2
AD26
DV2_DATA3
AD30
DV2_DATA4
AE26
DV2_DATA5
AE27
DV2_DATA6
AE28
DV2_DATA7
AE29
DV2_DATA8
AG27
DV2_DATA9
AK28
33R
3LR0
DV3_CLK
AK30
33R
3LS1-2
DV3_VALID
33R
3LR9-4
AJ30
DV3_DATA0
AH29
33R
3LR9-3
DV3_DATA1
AG29
33R
3LS0-3
DV3_DATA2
AG30
33R
3LR9-1
DV3_DATA3
AH30
33R
3LS1-1
DV3_DATA4
AG28
33R
3LS0-2
DV3_DATA5
33R
3LR9-2
AH27
DV3_DATA6
AJ28
33R
3LS1-3
DV3_DATA7
3LS1-4
AK29
33R
DV3_DATA8
AH28
33R
3LS0-4
DV3_DATA9
3
4
81
5
6
OUTPUT INTERFACE
MP-ROUT-0
A27
RIN0
MP-ROUT-1
A28
RIN1
MP-ROUT-2
A29
RIN2
A30
MP-ROUT-3
RIN3
B28
MP-ROUT-4
RIN4
B30
MP-ROUT-5
RIN5
MP-ROUT-6
C28
RIN6
MP-ROUT-7
C29
RIN7
MP-ROUT-8
C30
RIN8
MP-ROUT-9
D27
RIN9
DV2A-CLK
D28
MP-GOUT-0
GIN0
MP-GOUT-1
D29
GIN1
MP-GOUT-2
D30
GIN2
MP-GOUT-3
E27
GIN3
MP-GOUT-4
E28
GIN4
MP-GOUT-5
E30
GIN5
F26
MP-GOUT-6
GIN6
F27
MP-GOUT-7
GIN7
MP-GOUT-8
F28
GIN8
MP-GOUT-9
F29
GIN9
MP-BOUT-0
F30
BIN0
MP-BOUT-1
G26
BIN1
DV3F-CLK
G27
MP-BOUT-2
BIN2
DV3F-VALID
G28
MP-BOUT-3
BIN3
MP-BOUT-4
G29
BIN4
DV3F-DATA0_SOP
MP-BOUT-5
G30
BIN5
DV3F-DATA1_ERR
MP-BOUT-6
H27
BIN6
DV3F-DATA2_0
MP-BOUT-7
H28
BIN7
DV3F-DATA3_1
H30
MP-BOUT-8
BIN8
DV3F-DATA4_2
J26
MP-BOUT-9
BIN9
DV3F-DATA5_3
DV3F-DATA6_4
DV3F-DATA7_5
DV3F-DATA8_6
DV3F-DATA9_7
5
6
7
8
9
B4B
7J00-2
PNX
2015
Φ
B26
TXPNXA-
LVDS_AN
C26
TXPNXA+
LVDS_AP
A25
LVDS_BN
TXPNXB-
B25
LVDS_BP
TXPNXB+
D25
TXPNXC-
LVDS_CN
E25
TXPNXC+
LVDS_CP
B24
LVDS_DN
TXPNXD-
C24
LVDS_DP
TXPNXD+
LVDS_EN
E24
TXPNXE-
F24
TXPNXE+
LVDS_EP
C23
LVDS_CLKN
TXPNXCLK-
D23
LVDS_CLKP
TXPNXCLK+
AJ10
RGB_CLK_IN
J30
MP-CLKOUT
J27
MP-OUT-FFIELD
RGB_UD
J29
MP-OUT-HS
RGB_HSYNC
J28
MP-OUT-VS
RGB_VSYNC
K26
RGB_DE
MP-OUT-DE
G_15861_011.eps
7
8
9
3LR0 D4
3LR1 C4
3LR9-1 D4
3LR9-2 E4
3LR9-3 D4
3LR9-4 D4
3LS0-2 D4
3LS0-3 D4
A
3LS0-4 E4
3LS1-1 D4
3LS1-2 D4
3LS1-3 E4
3LS1-4 E4
7J00-2 B7
7J00-4 B2
AJ10 D8
B
C
D
E
140606
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