Sony CDP-CX57 Service Manual page 42

Pin No. Pin Name
MUTER
42
43 XVDD
XOUT
44
XIN
45
XVSS
46
47 SBSY
EFLG
48
PW
49
SFSY
50
SBCK
51
FSX
52
WRQ
53
54 RWC
SQOUT
55
COIN
56
CQCK
57
RES
58
TEST11
59
16M
60
4.2M
61
TEST5
62
CS
63
64 TEST1
I/O
O
Line muting on/off control signal output terminal (for R-ch side) "H": muting on
— Power supply terminal (+5V) (crystal oscillator system)
O
System clock output terminal (16.9344 MHz)
I
System clock input terminal (16.9344 MHz)
—
Ground terminal (crystal oscillator system)
O C1, C2, single correction, and double correction monitor output to the CD text decoder (IC104)
O
Subcode P to W output terminal
O
Subcode frame sync signal output to the CD text decoder (IC104)
O
Write frame clock signal output to the CD text decoder (IC104)
I
Subcode reading clock signal input from the CD text decoder (IC104) (schmitt input)
O
7.35 kHz sync signal output divided from the crystal oscillation
O
Subcode Q synchronizing signal output to the system controller (IC501)
I Command chip enable signal input from the system controller (IC501) (schmitt input)
O
Subcode Q data output to the system controller (IC501)
I
Command serial data input from the system controller (IC501)
Command serial clock signal input from the system controller (IC501) (schmitt input)
I
Fetching clock input or subcode extracting clock input from SQOUT (pin % )
System reset signal input from the reset signal generator (IC201) "L": reset
I
For several hundreds msec. after the power supply rises, "L" is input, then it changes to "H"
O
Test output terminal Not used (open)
O
Master clock signal (16.9344 MHz) output to the CD text decoder (IC104)
O
Reference clock signal (4.2336 MHz) output to the RF amplifier (IC102)
I
Test input terminal (fixed at "L" in this set)
I
Chip select signal input terminal Not used (fixed at "L")
I Test input terminal (fixed at "L" in this set)
Function
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