TDK Module blu2i User Manual page 10

Tdk module user guide
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Notes:
• UART_RX, UART_TX, UART_CTS, UART_RTS, UART_RI,
UART_DCD and UART_DSR are all 3.3v level logic. For example,
when RX and TX are idle they will be sitting at 3.3V. Conversely
for handshaking pins CTS, RTS, RI, DCD, DSR a 0v is treated as
an assertion.
• Pin 6 (UART_RI) is active low. It is normally 3.3v. When a remote
device initiates a connection, this pin goes low. This means that
when this pin is converted to RS232 voltage levels it will have the
correct voltage level for assertion.
• Pin 8 (UART_DCD) is active low. It is normally 3.3v. When a
connection is live this pin is low. This means that when this pin is
converted to RS232 voltage levels it will have the correct voltage
level for assertion.
• Pin 10 (UART_DSR) is an input, with active low logic. It should be
connected to the DTR output of the host. When the blu
in high speed mode (See definition for S Register 512), this pin
should be asserted by the host to ensure that the connection is
maintained. A deassertion is taken to mean that the connection
should be dropped, or an online command mode is being
requested.
• The GPIOn pins can be accessed using S Registers 621 to 625
• GPIO4 and GPIO5 are also connected to LEDs on the module. If
these I/O pins are set for input, then the LED will be driven by the
host and appropriate drive current requirements must be satisfied.
By default GPIO4 is used to drive the right LED which indicates
connection status. A Logic 1 switches on the LED.
• Analogue 0 and 1 should not exceed 1.8v and S Registers 7xx are
used to access them.
• GPIO3 is used for DTR output (active low).
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