An example can be in more than one sentence. Results generated by example command-lines are also displayed in mono-space courier font. • The software version references such as 2.3.x, 2.4.x, 2.5.x are specific to Endace Measurement Systems and relate to Company software products only. Protection Against Harmful Interference When present on product this manual pertains to and indicated by product labelling, the statement "This device complies...
2.0 INSTALLING DAG 3.6D CARD ..................5 2.1 Installation of Operating System and Endace Software..........5 2.2 Insert DAG 3.6D Card into PC ..................5 2.3 DAG 3.6D Card Port Connectors ................... 6 3.0 CONFIDENCE TESTING DAG 3.6D CARD..............7 3.1 DAG 3.6D Card Sensitivity ....................
EDM01-14 DAG 3.6D Card User Guide 1.0 PREFACE Introduction The installation of the Endace DAG 3.6D card on a PC begins with installing the operating system and the Endace software. This is followed by fitting the card and connecting the ports.
The DAG cards are PCI-bus cards designed for cell and packet capture and generation, specialised on IP networks. Various versions have been produced with different interfaces, this manual describes the DAG 3.6D Dual DS3/T3 co-axial interface. Figure Figure 1-1 shows the DAG 3.6D card.
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Figure 1-2. DAG 3.6D Card Major Components and Process Flow. Time stamped packet or cell records are stored in a FIFO. The DAG 3.6D can demap either ADM (ATM Direct Mapped) ATM cells, or PLCP (Payload Layer Convergence Protocol) ATM cells.
The framer is normally set up to map DS3 payloads, but other mappings are possible. For detailed information on device address mapping on the StrongARM bus, or to discuss the use of other extended features contact the Endace customer support team at support@endace.com 1.5 DAG 3.6D Card System Requirements...
A DAG 3.6D card can be installed in any free Bus Mastering PCI slot The DAG 3.6D card should be the only device on the PCI bus if possible as the cards make very heavy use of PCI bus data transfer resources.
Power Up Computer 2.3 DAG 3.6D Card Port Connectors Description There are two metal co-axial BNC connectors on the DAG 3.6D card. The top co-axial is Port A, furthest from the PCI slot. The bottom one is Port B. Port A is receive only, while port B can be ordered as either a second receive port or a transmit port.
3.1 DAG 3.6D Card Sensitivity Description The input signal level to the DAG 3.6D card should be within the dynamic range of the receiver. If the input signal power is slightly out of range then an increased bit error rate will be experienced.
Active splitters may have little or no insertion loss. 3.2 Interpreting DAG 3.6D Card LED Status Description The DAG 3.6D card has status eight LED’s, five coloured green and three red. Figure Figure 3-1 shows the DAG 3.6D card status LEDs.
3.3 DAG 3.6D Card LED Display Functions Description On the DAG 3.6D series of cards LEDs 1 and 2 display when powered up. When DS3 signals are applied LEDs 6 and 8 should go out, LEDs 5 and 7 should come on. The status of these LEDs should not change during normal operation of the card.
3.5 DAG 3.6D Card Capture Session Description The DAG 3.6D card uses the SONET PDH ATM physical layer interface device to support capturing of ATM. The card supports the DS3 standard. A successful DAG card capture session is accomplished by checking the receiver ports optical signal levels and checking the card has correctly detected the link.
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Configure card according to local settings. Check through the physical layer statistics that the card is locked to the data stream. Step 4. List Current Settings For DAG 3.6D framer configuration and statistics the tool is dagthree supplied. Calling without arguments lists current settings.
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EDM01-14 DAG 3.6D Card User Guide Status bits The tool will display a number of status bits as they have occurred since display the last time read. In our example, the interval is set to one second via the option.
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Cell Status bits The PLCP LoF and OoF status bits are not valid during ADM operation, and will read as 0. General Programmable counters are not available on the DAG 3.6D with this purpose release. counters Test trace If those tests provide a satisfactory status, a test trace should be taken. We...
EDM01-14 DAG 3.6D Card User Guide 3.7 Reporting Problems Description If there are unresolved problems with a DAG card or supplied software, contact Endace Technical Support via the email address support@endace.com. Supplying sufficient information in an email enables effective response. Problem...
For a typical measurement session, first move to the directory, load the driver, then load the appropriate Xilink receive image to each DAG card. For example, with two DAG 3.6D cards installed: drv/dagload tools/dagld -d dag0 -x xilinx/dag36pci-erf.bit:xilinx/dag36atm-erf.bit The integrity of the card’s physical layer is then set and the integrity of the physical layer to both DAG cards checked.
4.2 High Load Performance Description As the DAG 3.6D card captures packets from the network link, it writes a record for each packet into a large buffer in the host PC’s main memory. Avoiding...
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DAG card in the system. For OC-12/STM-4 (622Mbps) rates and above, 128MB or more may be required per card. To change the amount of memory reserved, edit the file . If the Endace Install CD has been used it will include this /etc/modules section: # For DAG 3.x, default 32MB/card...
Common synchronization sources include GPS or CDMA (Cellular telephone) time receivers. Endace produces the TDS 2 Time Distribution Server modules and the TDS 6 units that enable multiple DAG cards to be connected to a single GPS or CDMA unit.
EDM01-14 DAG 3.6D Card User Guide 5.1 Configuration Tool Usage Description The DUCK is very flexible, and can be used in several ways, with or without an external time reference source. It can accept synchronization from several input sources, and can also be made to drive its synchronization output from one of several sources.
EDM01-14 DAG 3.6D Card User Guide 5.2 Time Synchronization Configurations Description The DUCK is very flexible, and can be used in several ways, with or without an external time reference source. The use includes a single card with no reference, two cards with no reference, and a card with reference.
EDM01-14 DAG 3.6D Card User Guide 5.2.2 Two Cards no Reference Time Synchronization Description When two DAG cards are used in a single host PC with no reference clock, the cards are to be synchronized in some way if timestamps between the two cards are to be compared.
[PPS] signal from external sources. sources This is derived directly from a reference source, or distributed through the Endace TDS 2 [Time Distribution Server] module which allows two DAG cards to use a single receiver. More cards can be accommodated by daisy-chaining TDS-6 expansion units to the TDS-2 unit, each providing outputs for an additional 6 DAG cards.
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EDM01-14 DAG 3.6D Card User Guide 5.2.3 Card with Reference Time Synchronization , continued Using external To use an external clock reference source, the host PC’s clock must be reference accurate to UTC to within one second. This is used to initialise the source DUCK.
EDM01-14 DAG 3.6D Card User Guide 5.3 Synchronization Connector Pin-outs Description DAG cards have an 8-pin RJ45 connector with two bi-directional RS422 differential circuits, A and B. The PPS signal is carried on circuit A, and the serial packet is connected to the B circuit.
EDM01-14 DAG 3.6D Card User Guide 6.0 DATA FORMATS OVERVIEW In this chapter This chapter covers the following sections of information. • Data Formats • Timestamps 6.1 Data Formats Description The DAG card uses the ERF Type 3 ATM Cell. Timestamps are in little- endian [Pentium native] byte order.
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EDM01-14 DAG 3.6D Card User Guide 6.1 Data Formats , continued Data Format Description flags: This byte is divided into 2 parts, the interface identifier, and the capture offset. 1-0: capture interface 0-3 2: varying record lengths present 3: truncated record [insufficient buffer space]...
EDM01-14 DAG 3.6D Card User Guide 6.1 Data Formats , continued Table Table 6- 3 shows the Type 3 ATM Cell Record. The diagram is not to scale. timestamp timestamp type:3 flags rlen lctr wlen ATM Header 48 bytes of cell Table 6-3.
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EDM01-14 DAG 3.6D Card User Guide 6.2 Timestamps , continued Example codes Here is some example code showing how a 64-bit ERF timestamp (erfts) can be converted into a struct timeval representation (tv). unsigned long long lts; struct timeval tv;...
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