Protect Violation Flag - Texas Instruments 990 Operation Manual

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This sequence of actions is repeated for each user program instruction, except under certain
conditions. The user must be aware of these exceptions:
• If the instruction was a BLWP (Branch and Load Workspace Pointer) or XOP
(Extended Operation), the processor executes an additional instruction before any
interrupts occur. (This feature is necessary to support reentrant subroutines using
BLWP or XOP instructions for linkage.)
• If there is a lower level interrupt pending, that interrupt is honored instead of the next
"user instruction". Therefore, when the programmer panel regains control, the return
PC points into the interrupt subroutine rather than the original user program.
2.11 WRITE PROTECT
The 990 Prototyping System is equipped with a write protect feature which permits or prohibits
writing to a selected area of memory. The write protect logic basically consists of a seven-bit
Upper and Lower Bound register and a Protect/Permit control bit (figure 2-3). The loading of
this register and control bit may be accomplished with the Set Write Protect Region (SP) and
Clear Write Protect Region (CP) commands (Section III), or by normal CRU communications.
2.11.1 SETfING A WRITE PROTECT REGION. To set a write protect region, the lower and
upper bounds must be output to CRU base address IFA0
16 •
The most significant bit (bit 0) is
the Protect/Permit bit. Bit 0, when set to 1, indicates write permit, and, when set to 0, indicates
write protect. To specify the protect region, memory is divided into 256-word blocks. The lower
and upper bounds are each seven bits long and serve as an index into the memory addresses to
specify which contiguous 256-word block of memory is to be protected. For example, the lower
bound of the protect region equal to 2000
16
would be represented in the Protect register as
10
16 ,
The memory block beginning at location 2000
16
is the sixteenth 256-word (5l2-byte)
memory block. A bound is calculated by dividing the starting address of the memory block by
200
16
(512
10 ),
In this example, 2000
16
divided by 200
16
is equal to 10
16 ,
The upper bound is
not included in the protect region. When outputting to the CRU Protect register to specify the
protect bounds, a Load CRU (LDCR) instruction with a count of 16 must be used to set all 16
bits because the Protect register works like a shift register. To protect the memory range 2000
16
to 4000
16 ,
the lower bound is set equal to 10
16 ,
the upper bound is set equal to 20
16 ,
and the
Protect bit is set to O. Therefore, the Protect register is set to 1020
16
by outputting these fields
to the CRU in the format specified in figure 2-3.
2.11.2 PROTECT VIOLATION FLAG. When an attempt is made to write into a memory
location within the protected region, the Protect Violation flag is set to FFFF
16'
This flag,
which is 0 normally, can be sensed by reading any of the 16 CRU bits at base lFA0
16 '
If this
protected region is within the TMS9900 on-board RAM, the write will not be inhibited. ~f this
protect region is on the expansion memory card, the write will be inhibited. Attempts to write
are flagged with an error message.
The Protect Violation flag may be cleared in two different ways:
1. I/O RESET (RSET) --:- This machine instruction clears the violation flag and sets bit 0
of the Protect register to 1 (not protected).
2.
Output a 1 to any or all of the 16 bits of the Protect register.
2-11
Digital Systems Division .