Texas Instruments TPA3251 User Manual page 7

www.ti.com
2.3.1 Connections and Board Configuration
1. Set J6 to H and J5 to L.
2. Connect the positive side of the load to OUTA (J9-RED) and OUTC (J2-RED) terminals (OUTA and
OUTC shorted).
3. Connect the negative side of the load to OUTB (J9-BLACK) and OUTD (J2-BLACK) terminals (OUTB
and OUTD shorted).
4. Install PBTL jumpers J7 and J8 (pulls input C and input D to GND).
5. Input configuration:
a. SE inputs: Connect the RCA male jack to the female RCA jack input A/AB (J3-RED) and set the J4
jumper positions to SE. Set J26, J27, J34, and J35 to RCA.
b. Differential inputs: Connect the positive RCA male jack to the female RCA jack input A/AB (J3-
RED) and connect the negative RCA male jack to the female RCA jack input B (J14-BLACK). Set
the J4 jumper position to DIFF, and set J26, J27, J34, and J35 to RCA.
c. AIB input: Set J26, J27, J34, and J35 to AIB.
2.3.2 Performance Data (PBTL Mode)
All measurements are taken at an audio frequency = 1 kHz, PVDD_X = 36 V, RL = 4 Ω, fS = 600 kHz,
ROC = 22 kΩ, Output filter: L = 7μH, C = 0.68 µF, with AES17 + AUX-0025 measurement filters.
SLAU751 – November 2017
Submit Documentation Feedback
Table 4. Jumper Configuration (PBTL Mode)
Jumper Setting
J29 IN
J32 IN
J33 IN
J36 IN
J16 3 to 4
J22 IN
J23 IN
J24 IN
J25 IN
J5 2 to 3
J6 1 to 2
J7 IN
J8 IN
J4 1 to 2
J19 1 to 2
J26 1 to 2
J27 1 to 2
J34 1 to 2
J35 1 to 2
J21 OUT
(1)
INA and INB are the inputs for PBTL, and INC and IND are grounded
for PBTL operation.
Copyright © 2017, Texas Instruments Incorporated
(1)
Comment
PVDD to 15-V BUCK
12-V LDO to 12-V TERM
3.3-V LDO to 3.3-V TERM
12-V LDO to GVDD
MASTER MODE 600kHz
OUTA CAP SHUNT
OUTB CAP SHUNT
OUTC CAP SHUNT
OUTD CAP SHUNT
M1 – L
M2 – H
PBTL SELECT INC – GND
PBTL SELECT IND – GND
INA/B SE INPUT
INC/D SE INPUT
INC-SEL RCA
IND-SEL RCA
INA-SEL RCA
INB-SEL RCA
C_START
TPA3251 Evaluation Module
Setup By Mode
7