Block Diagram; Main Block Diagram - Panasonic TX-LR32B6 Service Manual

9 Block Diagram

9.1.

Main Block Diagram

Only SAT models
LNB
2ndLow_IF,IFAGC
1stLow_IF IFAGC
Terrestrial
Terrestrial / Satellite
Satellite
HDMI1
HDMI2
CI_POWER_ON
< CI_OCP
Only DVB-T2 models
TS-IN
HS1BCLKIN
CI
HS1SYNCIN
HS1VALIN
HS1DIN0
SAT2.5 / SAT1.2
HS1DIN1
S3.3 S3.3
HS1DIN2
DCDC
HS1DIN3
S3.3 / TU1.8
1.1V HS1DIN4
HS1DIN5
DMD_IIC1 (IIC2) HS1DIN6
IF_AGC2 HS1DIN7
TS-IN
HS1DIN8
Low-IF2 DVB-T2
TS-OUT
(5V Tole)
Demod.
< FE_XRST
Low-IF1
IF_AGC1
DMD_IIC0
CXD2837
< FE_XRST
or
DMD_IIC1 (IIC2)
Cross Stream Switch
TUNER
< FE_SAT_RST
DTV Decoder
Terrestrial
ADC VIF Decoder
SIF Decoder
R1, G1, B1, V1
Vout
Lin1,Rin1
Lout,Rout
VIO
FB,SLOW,QLINK
V-SW
Y2,Pb2,Pr2/V2
LIN2, RIN2
R3, G3, B3, H,V R3, G3, B3, H,V
AIO
A-SW
HP_DET HP1_L/R
Head
Phone
SOUND_VCC
ALRCKO
ASDOUT0
ABCKO
PWM
ASMCK
AMP
LV4923V
OPT
Optical OUT IECOUT
ARCOUT
Rx*
DDC* > STM, Peaks
HPD* < STM
HDMI_5V_DET* > STM
Rx*
HDMI
Rx
DDC* > STM, Peaks MUX
HPD* < STM x3
HDMI_5V_DET* > STM
No use 24/19XM6
XERWE0
XERWE0
CPU BUS
AAR/DATA XECS1
CTRL
S5/ S3.3
ERXW
ES0
>
BOOTSWAP
ES1
XRST
CI ES2
Power XRSTSTM
Circuit
Support < TV_SOS
ED[7:0] ED[7:0]
AMP/HP MUTE
Card
MONITOROUT MUTE
Data Buffer
JTAG
DTV_XRST
PCDOE
ERXW
S3.3
2G - Function
VIErA-CAST Browser
EU MHP
UK BBC iPlayer
NAND
Latin GINGA MHP
S12 S12
Flash
1G
CI-IF
CI-IF
PCOE
(5V Tolerant)
XNFCE,XNFW Peaks
PCWE
Peaks
PCWAIT
PCIORD P DCDC
PCCD1 DCDC
PCIOWR NFCLE,NFALE
PCCD2 VM
PCRESET
PCREADY XNFWE,XNFR
PCCE1 JTAG
E
AFB
NANDRYBY
S1.1 S1.5 S3.3 S3 3 3
ED[ :0]
NFD[7:0]
CPUBUS NAND-IF
Trans Port Decoder
IIC
DMD
DMD-IIC0
P-IIC2 (For DMD only)
DMD-IIC1
Peaks
Video
Analog Video IPR INS
Format
Processor
sLD8
Processor
DSP
I2S
SW
A-Chip
A-D Chip
Internal BUS
D-Chip
DMD IIC IIC
DMD_IIC0 P-IIC0
DMD_IIC1 P-IIC1
AMP
PWM
SPDIF
SW
CLK
GEN
25MHz
25
S9
STB5/5VS S12/S5
(SD-Data-VCC)
S9-REG
Analog
3 3.3/1.8 3 3 3 / / 1 1 8 8
ASIC
UHS-1 < (SDVOLC)
REG
AN34043A
STB3.3V/1.2V_REG OVP
Safety
STB5V Reset IC (STM) SOS
Circuit
S9V_REG
S12V Reset IC (Peaks)
Audio MUTE
OCP/OVP/TV-SOS < MON_MUTE
HP_MUTE,EXT_MUTE < SP_HP_MUTE
UHS-I_REG
PWM >
TV_SOS
PWM
Back Light
PWM >
DC DC DCDC_EN BL_ON >
BL_SOS <
INVERTER
DT DTV_XRST > T
or
LED Driver
SW_OFF_DET > SW W
STB3.3
STB1.2
XRST STB_XRST PWMA
POWER_DET
Panel
LVDS
HD : (DATA 4pairs / CLK 1pair) single8bit
FHD: (DATA 4pairs / CLK 1pair) dual8bit
S1.5 S1.5 DDR3
DDR3+(1333) DDR3+(1333)
x16 x16
1G 1G
S5
USB
USB*VBUS >
USB
< USB*OC
S5
Power SW
USB Memory
S5
LAN
SD CARD
Serial
P-Serial0
P-Serial1
P-UART0
P-UART2
S3.3
For Peaks
EEP
EEPROM_WP
EEP
P-IIC
STM
IIC
STM-IIC
Serial
STM-Serial0
STM-Serial1
STB3.3 < KEY3
POWER KEY
STB1.2
< KEY1
CONTROL PANEL KEY
TX-LR32B6