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KX-TVM200E / KX-TVM200NE
6.1.8.
Local Bus Gate
Synchronous and asynchronous buses coexist on the main board of this system. Because a synchronous bus is affected by the
signal line load capacitance and load capacitance due to the pattern of the host, in this system the synchronous bus connects
directly with the CPU acting as the primary bus, and in order to minimize the load capacitance, the board is designed taking
pattern and run lengths into consideration. Other peripheral devices connected to the asynchronous bus are separated by the
gate IC, and a gate control circuit was added to the board to open the bus as needed.
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