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IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS-1
Q201: CS494003CQZ (Multi-Standard Audio Decoder)-1/11
BLOCK DIAGRAM
Compressed
Digital
Interface
Digital
Audio
Input
DSP AB
PLL Clock
Manager
PIN LAYOUT
TE
L 13942296513
AUDATA1
AUDATA0
CMPCLK, FSCLKN2
HDATA2, GPIO2
HDATA0, GPIO0
CMPREQ, FLRCLKN2
CMPDAT, FSDATAN2
FLRCLKN1
WR, DS, GPIO10
RD, R/W, GPIO11
PLLVSS
PLLVDD
XTALO
CLKIN, XTALI
CLKSEL
CS, GPIO9
A0, GPIO13
FSDATAN1
FSCLKN1, STCCLK2
SCDIN
A1, GPIO12
HINBSY, GPIO8
SCCLK
UHS2, CS_OUT, GPIO17
RESET
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.
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Frame
Shifter
Multi-Standard
Audio decoder
Input
Buffer
Parallel or Serial
RAM
Host Interface
110
VSS3
VDD3
115
120
FILT2
FILT1
125
130
VDD4
VSS4
SCS
135
VSS5
VDD5
140
144
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8
SAI 0
SAI 1
SAI 2
SAI 3
DSP C
Programmable
32 - Bit DSP
DSP
RAM
Q Q
3
6 7
1 3
u163
.
2 9
9 4
2 8
Serial
External Memory
Audio
Interface
Interface
Digital
Audio
Output
GPIO and I/O
Controller
DSP
ROM
Parallel or Serial
Host Interface
1 5
0 5
8
2 9
9 4
SD_ADDR10, EXTA10
SD_BA, EXTA19
70
VDDSD1
VSSSD1
SD_CS
65
60
VDDSD2
VSSSD2
SD_DATA8, EXTA11
55
SD_DATA9, EXTA12
SD_DATA10, EXTA13
SD_DATA11, EXTA14
SD_DATA12, EXTA15
VDDSD3
VSSSD3
50
SD_DATA13, EXTA16
NC5
SD_DATA14, EXTA17
SD_DATA15, EXTA18
45
SD_DQM1
VDDSD4
VSSSD4
40
SD_DQM0
m
co
TX-SR403/8340
9 9
DAO 0
DAO 1
2 8
9 9
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