Basic Input And Output; Accessing The Control Registers; Direct Access To Vdp Registers; Indirect Access To Registers Through R#17 (Control Register Pointer) - Yamaha V9938 Programmer's Manual

Msx-video
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1.1. Accessing the Control Registers

V9938 has 4 ports: port #0 – port #3; port number is selected by VDP address lines
A0 and A1. Table below also shows port address allocation for MSX compatible machine.
A1
Port #0
0
Port #1
0
Port #2
1
Port #3
1
There are two ways to set data in the MSX-VIDEO control registers (R#0 to R#46).

1.1.1. Direct access to VDP registers

Output the data and the register number in sequence to port #1. The order of reads
and writes to/from VDP ports is vitally important, thus you should keep in mind that this
order can be potentially interrupted by CPU interrupt routine which can write to or read
from VDP port(s) and thus break the proper sequence. In case of Z80 CPU, use DI
(disable interrupts) at the start and EI (enable interrupts) at the end of VDP your access
code.
Data byte is written first (bits D0-D7), and register number is written next to data
byte (bits R0-R5). If interrupt involving VDP operations will occur between these two
operations, it may cause unpredictable results.
Port #1 first byte
Port #1 second byte

1.1.2. Indirect access to registers through R#17 (Control Register Pointer)

Set the register number in R#17 using direct addressing and then send data to Port
#3. MSB of the value written to R#17 (AII) controls auto-incrementing of the register
number. If auto-incrementing is enabled, after each data read or write control register
pointer is incremented; if auto-incrementing is disabled then pointer value in R#17 remains
unchanged. Auto-increment mode is useful for bulk read or update of VDP registers.
© 1985 ASCII CORP. / NIPPON GAKKI CO.

1. BASIC INPUT AND OUTPUT

A0
Operation
0
VRAM Data (R/W)
1
Status Register (R)
VRAM Address (W)
Register set-up (W)
0
Palette registers (W)
1
Register indirect addressing (W)
MSB
7
6
D7
D6
D5
1
0
R5
5
4
3
2
D4
D3
D2
R4
R3
R2
Page 13 of 108
Primary MSX port (Hex)
98h
99h
9Ah
9Bh
1
0
LSB
D1
D0
Data
R1
R0
Register #
© 2010-2015 Eugeny Brychkov

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