LG CJ65 Service Manual page 42

NO SOUND
There is no sound output in the TUNER FUNCTION, repair the set according to the following guide.
5-5. IN THE TUNER FUNCTION
5-5-1. Solution
Please check and replace IC202, TU200 on MAIN board.
5-5-2. How to troubleshoot (Countermeasure)
1) Check if TUNER_LR is entered from Pin1, 3 of TU200 to IC202(Pin27, 28).
  If no signals, check +3.3 V for tuner power.
  Check if the tuner control signals (CLK, DAT, CE, RST, SLT) are entered from IC500 to TU200.
If it doesn't work, replace TUNER with a new one.
2) Check if MCS_BCK, MCS_LRCK, & MCS_MCLK are entered from IC500 to IC202.
3) Check if ADC_DATA is entered from IC202 to IC500.
  If no signal, check +5 V & +3.3 V(ADC) for IC202. If is NG, replace it with a new one.
4) Check the following I2S audio signal flow from IC500 to IC700. (Refer to Item 5-1.)
  If there is any trouble, check the power for each IC. The power is normal but, if the signal waveform to
the IC is distorted or no signal, replace it with a new one.
5) Check if the digital audio AMP block is okay. Refer to "Digital Audio AMP" guide on Item 5-2.
  If AMP is damaged, replace it with a new one.
5-5-3. Service hint (Any picture / Remark)
TUNER
TUNER_L/R
A
12.288 MHZ
PWM
< TUNER IN function signal fl ow >
ONE POINT REPAIR GUIDE
DSP IC500
176 PIN
BGA
IC202
Audio DSP-1
USB 2.0 OTG
SRAM29KB
Main Processor
Audio DSP-0 DSP
I-Cache 8KB
133Mhz
USB 1.1
16KB SRAM29KB
ARM DSP
Host/Device
I-Cache D-Cache 8KB
926EJS
I-Cache 8KB
133Mhz
16KB
400Mhz
SRAM (10K) D-Cache 8KB
D-Cache
I2S (7.1ch)
SDRAM
Controller Boot ROM (20KB) GDMA 2ch
SPDIF (Rx, Tx)
Interrupt
ADPCM
controller
CDROM x8 speed
Decoder
PLL
ADC (12bit*5ch) RTC & Wake up
Clock Controller
GDMA 3ch
Timer, Watchdog UART 4ch (Max)
Reset Controller
NAND Controller GPIO (72 Max) I2C 2ch
within BCH codec
Test Controller
14bits ECC SPI 4ch (Max) SDHC-SDIO 4ch (Max)
FR,FL
< Signal check point >
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