Table of Contents
Advertisement
TH-37PV7F / TH-37PV7P / TH-37PX7B / TH-37PX7E / TH-42PV7F / TH-42PV7P / TH-42PX7B / TH-42PX7E
15.18. DG-Board (4 of 16) Schematic Diagram
11
12
13
SUB3.3V
L8551
R8551
J0JHC0000075
10k
AF_NAND_RY/BY
C8554
C8553
16V
16V
0.1u
0.1u
R8564
10k
128/256Mbit NOR FLASH
!
DG-BOARD (4/16)
TXNDG1HRTB (PX7B)
TXNDG1HRTD (PX7E)
TZTNP01MJTE (PV7F/P)
14
TH-37/42PV7F/P, TH-37/42PX7B/E
DG-Board (4 of 16) Schematic Diagram
28
29
AA_EA8
R8621
68
AA_ED0
AA_ED1
AA_EA9
R8622
68
AA_EA10
R8623
68
C8555
AA_ED2
16V
0.1u
AA_ED3
AA_EA11
R8624
68
*IC8554
<
TVRP643:PX7B
TVRP644:PX7E
TVRP663:PV7F/P
AA_EA16
R8625
68
AA_ED8
AA_ED9
AA_EA17
R8626
68
AA_EA18
R8627
68
AA_ED10
AA_ED11
AA_EA19
R8628
68
TP8746
SUB3.3V
R8711
R8712
10k
10k
FOR
TP8750
SUB5V
FACTORY
JK8702
AA_ESZ0
USED
TP8757
1
TP8758
+5V
2
SBI0
AA_SBO0
3
SBO0
4
30
31
SUB3.3V
D-LATCH
IC8621
L8621
J0JHC0000075
C0JBAZ002845
1
20
OE
Vcc
C8622
2
19
R8629
68
AA_EA15
16V
Q0
Q7
0.1u
AA_ED7
3
D0
18
D7
4
17
AA_ED6
D1
D6
R8630
AA_EA14
5
Q1
16
68
Q6
6
15
R8631
68
AA_EA13
Q2
Q5
AA_ED5
7
D2
14
D5
8
D3
13
AA_ED4
D4
9
12
R8632
68
AA_EA12
Q3
Q4
AA_XEAS
10 GND
11
LE
D-LATCH
IC8622
C8621
16V
0.1u
C0JBAZ002845
1
OE
20
Vcc
2
Q0
19
R8633
68
AA_EA23
Q7
3
18
AA_ED15
D0
D7
AA_ED14
4
D1
17
D6
5
16
R8634
68
AA_EA22
Q1
Q6
R8635
AA_EA21
6
Q2
15
68
Q5
7
14
AA_ED13
D2
D5
AA_ED12
8
D3
13
D4
9
Q3
12
R8636
68
AA_EA20
Q4
10 GND
11
LE
R8709
0
AA_XEAS
TP8751
AA_ESZ1
AA_SBI0
32
33
78
LiteII
to (1/16)
NAND I/F
XNFCE
INT.PU
AF_NAND_RY/BY
R8556
68
NANDRYBY
non
NFCLE
non
XNFWE
INT.PU
XNFRE
INT.PU
NFALE
non
XNFWP
INT.PU
Reserved for NAND I/F
R8867
EXB2HV680JV
ADDRESS MPXed, if D-Latch
AA_ED0
ED0
/EA8
AA_ED1
ED1
/EA9
AA_ED2
ED2
/EA10
AA_ED3
ED3
/EA11
AA_ED4
ED4
/EA12
AA_ED5
ED5
/EA13
AA_ED6
ED6
/EA14
AA_ED7
ED7
/EA15
AA_ED8
ED8
/EA16
AA_ED9
ED9
/EA17
AA_ED10
ED10
/EA18
AA_ED11
ED11
/EA19
AA_ED12
ED12
/EA20
AA_ED13
ED13
/EA21
AA_ED14
ED14
/EA22
AA_ED15
ED15
/EA23
R8866
EXB2HV680JV
ED/EA with Int.PU at start
(XECS2,3 setting)
R8865
EXB2HV680JV
AA_EA0
EA0
AA_EA1
EA1
AA_EA2
EA2
AA_EA3
EA3
AA_EA4
EA4
AA_EA5
EA5
AA_EA6
EA6
AA_EA7
EA7
AA_EA24
R8710
68
VI2P4
EA24
INT.PD
AA_EA25
SUB3.3V
SUB3.3V
clk_mode[0-5]
Debug Use
R8935
10k
RMCO
PORT16[5]
CONNECTED TO GENX4 FROM LiteII ON SHEET008
VI2ENB
PORT6[6]:PSV1
R8869
No INT.PD at RESET
10k
VI2P11
P_MAIN_SW
Just for Debug Use
TP8852
ADCCK
RSV2
PORT5[2]
Hi-Z
SUB3.3V
TP8853
SLRCK
RSV3
PORT5[1]
Hi-Z
ExBUS
R8871
10k
AA_FE_XRST
R8947
XECS3,5,7: USED FOR OTHER PORPOSE PINS
68
XECS6
INT.PU
see also SDA2 for ea_pullup_sel
AA_XECS0
R8877
68
XECS0
OUTPUT
AA_XECS1
R8878
68
XECS1
OUTPUT
AA_XECS2
R8879
68
XECS2
Reserved/(ed_pullup_sel)
TP8854
AA_XEAS
R8880
68
XECS4
OUTPUT/(BOOTBT)
R8881
68
IS1DATA
PORT16[4]
Hi-Z
AA_XNMIRQ
R8882
R8868
68
XNMIRQ
INT.PU
68
AA_XIRQ1
R8883
68
XIRQ1
NEED EXT.PU
AA_XIRQ2
R8884
R8874
68
XIRQ2
NEED EXT.PU
10k
XIRQ3 for HDMI_INT in ADV sheet
R8870
AA_ERXW
R8885
68
ERXW
INT.PU
0
AA_XERE
R8886
68
XERE
INT.PU
AA_XEWE0
R8887
68
XEWE0
INT.PU
AA_XEWE1
R8888
68
XEWE1
INT.PU
AA_XEDK
R8889
68
XEDK
INT.PU
AA_ECLK
R8890
68
ECLK
OUTPUT
AA_ESZ0
R8891
68
ESZ0
OUTPUT
AA_ESZ1
R8892
68
ESZ1
OUTPUT
AA_XRST
R8893
0
XRST
AA_BOOTSWAP
R8894
68
BOOTSWAP
INT.PU
TP8851
AG_DTV_VOUTENB
R8896
0
VOUTENB
AG_SD_BOOT_STS
R8897
0
ADIN
PORT16[7], SD_BOOT
R8898
10k
VI1CLK2
R8899
10k
AA_SBI0
R8900
68
SBI0
DUBUG/JIG
AA_SBO0
R8901
68
SBO0
INT.PU
AA_SBI0
to (10/16)
AA_SBO0
SUB3.3V
JTAG
R8742
10k
R8735
68
TMS
TP8767
R8736
68
TRST
R8737
68
TDI
R8732
R8738
68
TDO
100
R8739
68
TCK
R8746
R8749
R8745
10k
10k
10k
TH-37/42PV7F/P, TH-37/42PX7B/E
DG-Board (4 of 16) Schematic Diagram
34
35
21
22
23
24
ExBUS
ExBUS
B_PORT
INT.PD
Hi-Z
25
36
Hide quick links:
Advertisement
Table of Contents
