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5. Frequency Synthesizer Unit
5-1. Frequency synthesizer
The frequency synthesizer consists of the TCXO (X1), VCO,
PLL IC (IC1) and buffer amplifiers.
The TCXO generates 16.8MHz. The frequency stability is
2.5ppm within the temperature range of –30 to +60˚C. The
frequency tuning and modulation of the TCXO are done to
apply a voltage to pin 1 of the TCXO. The output of the TCXO
is applied to pin 8 of the PLL IC.
The TK-3148's VCO consists of 2VCO and covers a dual range
of the 305.15~445.15MHz and the 350~390MHz. The VCO
generates 405.15~425.15MHz for providing to the first local
signal in receive. The operating frequency is generated by Q3 in
transmit mode and Q2 in receive mode.
The oscillator frequency is controlled by applying the VCO
control voltage, obtained from the phase comparator (IC1) to
the variable capacitor diodes (D1, D3, D7, and D8 in transmit
mode and D2, D4, D9 and D10 in receive mode).
The T/R pin of IC312 goes "high" in receive mode causing
Q4, Q6 and Q3 to turn off, and Q2 turn on. The T/R pin goes
"low" in transmit mode.
The outputs from Q2 and Q3 are amplified by buffer amplifier
(Q5) come to the amplifiers.
The PLL IC consists of a prescaler, fractional divider,
reference divider, phase comparator, charge pump. This PLL
IC is fractional-N type synthesizer and performs in the 40,50
or 60kHz reference signal which is eighth of the channel step
(6.25kHz). The input signal from the pins 5 and 8 of the PLL IC
is divided down to the 50kHz and compared at phase
comparator. The pulsed output signal of the phase comparator
is applied to the charge pump and transformed into DC signal
in the loop filter (LPF). The DC signal is applied to the pin 1 of
the VCO and locked to keep the VCO frequency constant.
PLL data is output from DP (pin 73). CP (pin 74) and EP (pin
72) of the microprocessor (IC309). The data are input to the
PLL IC when the channel is changed or when transmission is
changed to reception and vice versa.
CIRCUIT DESCRIPTION /
T/R
T/R
VCO
(TX : Low)
CV
LPF
IC1
PLL
18
UL
CPU
DP,CP,EP
IC309
Fig. 9 PLL block diagram / 图 9 锁相环方块图
电路说明
5．频率合成器单元
5-1．频率合成器
频率合成器由 TCXO（X1） ，VCO，PLL IC（IC1）和缓冲放
大器组成。
TCXO产生16.8MHz的频率。 在－30到＋60℃的温度范围内，
频率稳定性为2.5ppm。 TCXO的频率调谐和调制是通过给TCXO
的管脚 1 提供电压来实现的。TCXO 的输出提供给 PLL IC 的管
脚 8。
TK-3148的VCO由两个VCO组成， 并且控制两个范围， 305.15-
445.15MHz 和 350-390MHz。VCO 产生 405.15-425.15MHz 的频率
提供给接收中的第一本振信号。在发送中，VCO 的管脚 3 变为
低电平，VCO 产生 350-390MHz 的频率。
由Q3在发送模式下产生工作频率和 Q2 在接收模式下产生工
作频率。
通过在可变电容二极管（发送模式下为 D1、D3、D7 和 D8，
接收模式下为 D2、D4、D9 和 D10）上施加从相位比较器（IC1）
获得的 VCO 控制电压来控制振荡频率。
在接收模式下 IC312 的 T/R 脚变为 "高" 电平， 从而关断 Q4、
Q6 和 Q3、打开 Q2。在发送模式下，T/R 脚变为"低"电平。来
自 Q2 和 Q3 的输出经过缓冲放大器（Q5）放大后进入放大器。
PLL IC 由预标定器，分级驱动器，参考驱动器，相位比较器
和负载增压组成。PLL IC 是 N 级合成器，并且以第 8 级信道
（6.25kHz）频率为 40,50 或 60kHz 的参考信号运行。来自于 PLL
IC 的管脚 5 和管脚 8 的输入信号被分割为 50kHz， 并且在相位比
较器中进行比较。 相位比较器的脉冲输出信号提供给负载增压，
并且被变压后进入环路滤波器 （LPF） 中的直流信号。 直流信号
提供给 VCO 的管脚 1 并被锁定，以保持 VCO 频率的稳定性。
微处理器（IC309）的 DP（管脚 73） ，CP（管脚 74）和 EP（管
脚 72）输出 PLL 数据。当信道改变或发送变为接收和声音反转
时，数据被输入到 PLL IC。
Q8
D101
BUFF
SW
Q1
D100
BUFF
SW
To mixer
5
8
FC
MB
TCXO
IC302
X1
BAL
TK-3148
To
drive
amp
15
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