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SMSC LPC47N217N Specifications

64-pin super i/o with lpc interface
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PRODUCT FEATURES

3.3 Volt Operation (5V tolerant)
Programmable Wakeup Event Interface (IO_PME#
Pin)
SMI Support (IO_SMI# Pin)
GPIOs (14)
Two IRQ Input Pins
XNOR Chain
PC2001
ACPI 2.0 Compliant
64-pin TQFP Package
Intelligent Auto Power Management
Serial Port
— One Full Function Serial Port
— High Speed 16C550A Compatible UART with
Send/Receive 16-Byte FIFO
— Supports 230k and 460k Baud
— Programmable Baud Rate Generator
— Modem Control Circuitry
— Multiple Base I/O Address options and 15 IRQ Options
SMSC LPC47N217N 64TQFP
LPC47N217N
64-Pin Super I/O with
LPC Interface
Multi-Mode Parallel Port with ChiProtect™
— Standard Mode IBM PC/XT
Compatible Bidirectional Parallel Port
— Enhanced Parallel Port (EPP) Compatible - EPP 1.7
and EPP 1.9 (IEEE 1284 Compliant)
— IEEE 1284 Compliant Enhanced Capabilities Port
(ECP)
— ChiProtect Circuitry for Protection Against Damage Due
to Printer Power-On
— 192 Base I/O Address, 15 IRQ and 3 DMA Options
LPC Bus Host Interface
— Multiplexed Command, Address and Data Bus
— 8-Bit I/O Transfers
— 8-Bit DMA Transfers
— 16-Bit Address Qualification
— Serial IRQ Interface Compatible with Serialized IRQ
Support for PCI Systems
— PCI CLKRUN# Support
— Power Management Event (IO_PME#) Interface Pin
PRODUCT PREVIEW
Data Brief
®
®
, PC/AT
, and PS/2™
Revision 0.2 (09-25-08)

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Summary of Contents for SMSC LPC47N217N

  • Page 1: Product Features

    — Supports 230k and 460k Baud — Programmable Baud Rate Generator — Modem Control Circuitry — Multiple Base I/O Address options and 15 IRQ Options SMSC LPC47N217N 64TQFP LPC47N217N 64-Pin Super I/O with LPC Interface Multi-Mode Parallel Port with ChiProtect™...
  • Page 2 Any and all such uses without prior written approval of an Officer of SMSC and further testing and/or modification will be fully at the risk of the customer. Copies of this document or other SMSC literature, as well as the Terms of Sale Agreement, may be obtained by visiting SMSC’s website at http://www.smsc.com.

  • Page 3: General Description

    64-Pin Super I/O with LPC Interface General Description The SMSC LPC47N217N is a 3.3V PC 99, PC2001, and ACPI 2.0 compliant Super I/O Controller. The LPC47N217N implements the LPC interface, a pin reduced ISA interface which provides the same or better performance as the ISA/X-bus with a substantial savings in pins used.

  • Page 4: Block Diagram

    CLOCK CLOCKI Vcc Vss Revision 0.2 (09-25-08) IO_PME# CONTROL, ADDRESS, DATA ACPI CONFIGURATION BLOCK REGISTERS Figure 1 LPC47N217N Block Diagram PRODUCT PREVIEW 64-Pin Super I/O with LPC Interface PD[0:7], MULTI-MODE BUSY, SLCT, PARALLEL PE, nERROR, nACK PORT nSLCTIN, nALF nINIT, nSTROBE...

  • Page 5: Package Outline

    4. 4 Dimension for foot length L measured at the gauge plane 0.25 mm above the seating plane. 5. 5 Details of pin 1 identifier are optional but must be located within the zone indicated. SMSC LPC47N217N 64TQFP Table 1 64 Pin TQFP Package Parameters NOMINAL 1.60...

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