E
S
LECTRICAL
PECIFICATION
Signal Name
DMARQ
(True IDE mode)
D15-D00
(PC Card memory
mode)
D15-D00
(PC Card I/O
mode)
D15-D00
(True IDE mode)
GND
(PC Card memory
mode)
GND
(PC Card I/O
mode)
GND
(True IDE mode)
This document and the information contained within it is confidential and proprietary to SiliconSystems, Inc.
3600C-04DSR
Table 8: Signal Descriptions (Continued)
Pin
Type Description
43
O
31, 30, 29,
I/O
28, 27, 49,
48, 47, 6,
5, 4, 3, 2,
23, 22, 21
1, 50
-
S
S
ILICON
YSTEMS
All unauthorized use and/or reproduction is prohibited.
P
9
AGE
SSD-C
XXX
In true IDE mode, this signal is used
for DMA transfers between the host
and device. DMARQ is asserted by
the device when the device is ready to
transfer data to/from the host. The
direction of data transfer is controlled
by -IORD and -IOWR. This signal is
used in a handshake manner with
-DMACK (i.e., the device waits until
the host asserts -DMACK before
negating DMARQ, and reasserts
DMARQ if there is more data to
transfer). The DMARQ/-DMACK
handshake is used to provide flow
control during the transfer.
These lines carry the data,
commands, and status information
between the host and the controller.
• D00 is the LSB of the word's even
byte.
• D08 is the LSB of the word's odd
byte.
This signal is the same as the PC
Card Memory Mode signal.
In true IDE mode, all Task File
operations occur in byte mode on the
low-order bus D00-D07, while all data
transfers are 16 bits using D00-D15.
Ground.
This signal is the same for all modes.
This signal is the same for all modes.
P
ROPRIETARY
(I)-3600 D
S
ATA
HEET
F
2, 2009
EBRUARY
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