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Table 1-1: SW2 Settings (Continued)
Bit Name
SW_EN
Connected to the GS2971 SW_EN pin. Used to enable switch-line locking. Please refer to the Data Sheet for more
information.
STANDBY
Connected to the GS2971 STANDBY pin. When this pin is set HIGH, the device power is reduced, and placed into
Standby mode.
1.4 Outputs
1.4.1 SDI Loop-Through (J5)
A relocked or non-relocked buffered version of the input stream is available on the
serial loop-through output (J5). It is designed to be SMPTE compliant for voltage level,
rise/fall time and return loss at three rates (SD, HD and 3G) using the compensation
network. The GS2978 Cable Driver is necessary to guarantee return loss specification.
The GS2978 should be set to SD or HD mode; use jumper JP4 to select the mode. See
Table 1-2
below.
Table 1-2: GS2978 Cable Driver format
JP4 Position
Status
Open
HD/3G
Closed
SD
If the SDI loop-through is not required, disable the SDO through the SDO_EN/DIS DIP
switch setting (SW2). Doing this will also disable the GS2978 Cable Driver.
1.4.2 Audio Output (J23 and BNCs J19-J22)
The extracted 8-channel audio, together with the Audio Master Clock generated by the
GS2971, is available on a 10-pin header (J23).
For AES mode, AES-encoded CMOS-level signals are distributed through line drivers,
and supplied to four BNC connectors (J19, J20, J21 and J22).
An audio output board can be connected to Serial Audio Output header (J23).
1.4.3 Parallel Video Output (J16 and J17)
Parallel video data with the PCLK is available on a 48-pin connector (J16) and timing
signals H, V and F are connected to a 10-pin connector (J17). This is a standard Gennum
parallel interface, compatible with all Gennum evaluation boards.
EB-GS2971
Evaluation Board User Guide
52169 - 2
June 2012
Description
7 of 22
Proprietary & Confidential
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