Table of Contents
Advertisement
QQ
3 7 63 1515 0
IC BLOCK DIAGRAM / TERMINAL DESCRIPTION
Q803: MPD4721GS RS-232C LINE DRIVER/ RECEIVER
BLOCK DIAGRAM
+10V
1
+
C
3
2
+3.3V
3
or
+5V
+
C
1
4
5
+
C
5
6
7
D
IN1
8
D
IN2
9
R
OUT1
TE
L 13942296513
10
R
OUT2
Truth table
Driver
STBY
L
H
H
Receiver
STBY
L
H
H
3V
5V switching
V
CHA
www
L
H
H : high-level, L : low-level, Z : high-impedance, x : H or L
.
http://www.xiaoyu163.com
V
DD
C
4+
C
+
1
GND
V
CC
C
4-
C
-
1
V
SS
C
+
5
C
-
5
NOTE1
300 ohm
300 ohm
5.5k ohm
5.5k ohm
Top View
D
D
IN
OUT
Standby mode
x
Z
Space level output
L
H
Mark level output
H
L
R
R
IN
OUT
x
H
Standby mode
L
H
Mark level input
H
L
Space level input
Operating mode
5 V mode (double step-up)
x
ao
y
3 V mode (3 times step-up)
i
http://www.xiaoyu163.com
8
20
+
C
4
19
+
C
18
2
-10V
17
STBY
16
V
15
CHA
D
14
OUT1
D
13
OUT2
R
12
IN1
Q Q
R
3
6 7
1 3
11
IN2
Remarks
Remarks
u163
.
2 9
9 4
2 8
20 Pin Plastic Shrink SOP
20
11
1
10
1 5
0 5
8
2 9
9 4
m
co
DV-SP55
9 9
2 8
9 9
Advertisement
Table of Contents
