Interface Distribution; Spi Interface; Mcsi Interface; Microwire Interface - Hytera MD652 Service Manual

UHF1 (400‐470 MHz)
Circuit Description
5.2.3

Interface Distribution

SPI Interface

SPI interface of processor U1002 operates in Master Mode, and is controlled by MPU or DMA. In Master
Mode, U1002 can provide 4 chip select signals, of which CS2 is used to control the IF processor U6001.

MCSI Interface

When communicating with U8001, U1002 works in Master Mode with clock frequency of up to 9.6 MHz.
U8001 uses MCSI synchronization as chip select signal and MCSI1.DOUT as data cable to configure its
register.

MICROWIRE Interface

The MICROWIRE interface can accommodate 4 external devices at most, which is generally used for
transmitting control and status messages of external devices, and reading data from ROM. Its maximum
clock frequency is a quarter of system clock frequency. In this case, MICROWIRE is used to configure or
read from the audio processor and requires chip select signal CS3.
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