Samsung MUXONENAND A-DIE KFN4G16Q2A Specification page 118

MuxOneNAND2G(KFM2G16Q2A-DEBx)
MuxOneNAND4G(KFN4G16Q2A-DEBx)
3.13.3 Multi-Block Erase Verify Read Operation
After a Multi-Block Erase Operation, verify Erase Operation result of each block with Multi-Block Erase Verify Command combined with
address of each block.
If a failed address is identified, it must be managed by firmware.
Multi Block Erase/ Multi Block Erase Verify Read Flow Chart
Start
Select DataRAM for DDP
Add: F101h DQ=DBS*
1)
Write 'DFS , FBA' of Flash
Add: F100h DQ=DFS, FBA
Write 0 to interrupt register
Add: F241h DQ=0000h
Write 'Multi Block Erase'
Command
Add: F220h DQ=0095h
Wait for INT register
low to high transition
Add: F241h DQ[15]=INT
Read Interrupt register
Add: F241h DQ[5]=EI
DQ[5]=1?
YES
Read Controller
Status Register
Add: F240h DQ[10]=0
Final Multi Block
Erase?
YES
Read Controller
NO
Status Register 'Lock' bit high
Add: F240h DQ[14]=Lock
Multi block Erase Lock/
Erase Lock Error
NOTE :
1) DFS should be a fixed value, for Multi Block Erase is performed within a single chip.
2) 'Write 0 to interrupt register' step may be ignored when using INT auto mode. Refer to chapter 2.8.18.
Write 'DFS, FBA' of Flash
Add: F100h DQ=DFS, FBA
Write 0 to interrupt register
Add: F241h DQ=0000h
Write 'Block Erase
Command'
Add: F220h DQ=0094h
Wait for INT register
low to high transition
Add: F241h DQ[15]=INT
Read Interrupt register
Add: F241h DQ[5]=EI
DQ[5]=1?
YES
Read Controller
Status Register
Add: F240h DQ[10]=0
Write 'DFS, FBA' of Flash
Add: F100h DQ=DFS, FBA
Write 0 to interrupt register
Add: F241h DQ=0000h
Write 'Multi Block Erase
NO
Verify Read Command'
Add: F220h DQ=0071h
Wait for INT register
NO
low to high transition
Add: F241h DQ=[15]=INT
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FLASH MEMORY
2)
Read Controller
Status Register
Add: F240h DQ[10]=Error
DQ[10]=0?
Erase completed
NO
Final Multi Block
Erase Address?
Multi Block Erase completed
Multi Block Erase Verify Read
*DBS, DFS is for DDP
(DFS must be same)
NO
YES
Erase Error
YES